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Issue 6452002: Change the code for materializing double constants on ia32.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 9 years, 10 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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938 938
939 void LCodeGen::DoConstantD(LConstantD* instr) { 939 void LCodeGen::DoConstantD(LConstantD* instr) {
940 ASSERT(instr->result()->IsDoubleRegister()); 940 ASSERT(instr->result()->IsDoubleRegister());
941 XMMRegister res = ToDoubleRegister(instr->result()); 941 XMMRegister res = ToDoubleRegister(instr->result());
942 double v = instr->value(); 942 double v = instr->value();
943 // Use xor to produce +0.0 in a fast and compact way, but avoid to 943 // Use xor to produce +0.0 in a fast and compact way, but avoid to
944 // do so if the constant is -0.0. 944 // do so if the constant is -0.0.
945 if (BitCast<uint64_t, double>(v) == 0) { 945 if (BitCast<uint64_t, double>(v) == 0) {
946 __ xorpd(res, res); 946 __ xorpd(res, res);
947 } else { 947 } else {
948 int32_t v_int32 = static_cast<int32_t>(v); 948 Register temp = ToRegister(instr->TempAt(0));
949 if (static_cast<double>(v_int32) == v) { 949 uint64_t int_val = BitCast<uint64_t, double>(v);
950 __ push_imm32(v_int32); 950 int32_t lower = static_cast<int32_t>(int_val);
951 __ cvtsi2sd(res, Operand(esp, 0)); 951 int32_t upper = static_cast<int32_t>(int_val >> (kBitsPerInt));
952 __ add(Operand(esp), Immediate(kPointerSize)); 952 if (CpuFeatures::IsSupported(SSE4_1)) {
953 CpuFeatures::Scope scope(SSE4_1);
954 if (lower != 0) {
955 __ Set(temp, Immediate(lower));
956 __ movd(res, Operand(temp));
957 __ Set(temp, Immediate(upper));
958 __ pinsrd(res, Operand(temp), 1);
959 } else {
960 __ xorpd(res, res);
961 __ Set(temp, Immediate(upper));
962 __ pinsrd(res, Operand(temp), 1);
963 }
953 } else { 964 } else {
954 uint64_t int_val = BitCast<uint64_t, double>(v); 965 __ Set(temp, Immediate(upper));
955 int32_t lower = static_cast<int32_t>(int_val); 966 __ movd(res, Operand(temp));
956 int32_t upper = static_cast<int32_t>(int_val >> (kBitsPerInt)); 967 __ psllq(res, 32);
957 __ push_imm32(upper); 968 if (lower != 0) {
958 __ push_imm32(lower); 969 __ Set(temp, Immediate(lower));
959 __ movdbl(res, Operand(esp, 0)); 970 __ movd(xmm0, Operand(temp));
960 __ add(Operand(esp), Immediate(2 * kPointerSize)); 971 __ por(res, xmm0);
972 }
961 } 973 }
962 } 974 }
963 } 975 }
964 976
965 977
966 void LCodeGen::DoConstantT(LConstantT* instr) { 978 void LCodeGen::DoConstantT(LConstantT* instr) {
967 ASSERT(instr->result()->IsRegister()); 979 ASSERT(instr->result()->IsRegister());
968 __ Set(ToRegister(instr->result()), Immediate(instr->value())); 980 __ Set(ToRegister(instr->result()), Immediate(instr->value()));
969 } 981 }
970 982
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3694 ASSERT(osr_pc_offset_ == -1); 3706 ASSERT(osr_pc_offset_ == -1);
3695 osr_pc_offset_ = masm()->pc_offset(); 3707 osr_pc_offset_ = masm()->pc_offset();
3696 } 3708 }
3697 3709
3698 3710
3699 #undef __ 3711 #undef __
3700 3712
3701 } } // namespace v8::internal 3713 } } // namespace v8::internal
3702 3714
3703 #endif // V8_TARGET_ARCH_IA32 3715 #endif // V8_TARGET_ARCH_IA32
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