OLD | NEW |
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
(...skipping 2541 matching lines...) Loading... |
2552 last_pc_ = pc_; | 2552 last_pc_ = pc_; |
2553 EMIT(0x66); | 2553 EMIT(0x66); |
2554 EMIT(0x0F); | 2554 EMIT(0x0F); |
2555 EMIT(0x3A); | 2555 EMIT(0x3A); |
2556 EMIT(0x16); | 2556 EMIT(0x16); |
2557 emit_sse_operand(src, dst); | 2557 emit_sse_operand(src, dst); |
2558 EMIT(offset); | 2558 EMIT(offset); |
2559 } | 2559 } |
2560 | 2560 |
2561 | 2561 |
| 2562 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { |
| 2563 ASSERT(CpuFeatures::IsEnabled(SSE4_1)); |
| 2564 EnsureSpace ensure_space(this); |
| 2565 last_pc_ = pc_; |
| 2566 EMIT(0x66); |
| 2567 EMIT(0x0F); |
| 2568 EMIT(0x3A); |
| 2569 EMIT(0x22); |
| 2570 emit_sse_operand(dst, src); |
| 2571 EMIT(offset); |
| 2572 } |
| 2573 |
| 2574 |
2562 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) { | 2575 void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) { |
2563 Register ireg = { reg.code() }; | 2576 Register ireg = { reg.code() }; |
2564 emit_operand(ireg, adr); | 2577 emit_operand(ireg, adr); |
2565 } | 2578 } |
2566 | 2579 |
2567 | 2580 |
2568 void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) { | 2581 void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) { |
2569 EMIT(0xC0 | dst.code() << 3 | src.code()); | 2582 EMIT(0xC0 | dst.code() << 3 | src.code()); |
2570 } | 2583 } |
2571 | 2584 |
(...skipping 206 matching lines...) Loading... |
2778 fprintf(coverage_log, "%s\n", file_line); | 2791 fprintf(coverage_log, "%s\n", file_line); |
2779 fflush(coverage_log); | 2792 fflush(coverage_log); |
2780 } | 2793 } |
2781 } | 2794 } |
2782 | 2795 |
2783 #endif | 2796 #endif |
2784 | 2797 |
2785 } } // namespace v8::internal | 2798 } } // namespace v8::internal |
2786 | 2799 |
2787 #endif // V8_TARGET_ARCH_IA32 | 2800 #endif // V8_TARGET_ARCH_IA32 |
OLD | NEW |