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Side by Side Diff: src/ia32/assembler-ia32.h

Issue 6452001: Allow esi to be an allocatable register on IA32. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 9 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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23 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 23 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 24 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 25 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
26 // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 26 // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
27 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 27 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
28 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
29 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 30
31 // The original source code covered by the above license above has been 31 // The original source code covered by the above license above has been
32 // modified significantly by Google Inc. 32 // modified significantly by Google Inc.
33 // Copyright 2010 the V8 project authors. All rights reserved. 33 // Copyright 2011 the V8 project authors. All rights reserved.
34 34
35 // A light-weight IA32 Assembler. 35 // A light-weight IA32 Assembler.
36 36
37 #ifndef V8_IA32_ASSEMBLER_IA32_H_ 37 #ifndef V8_IA32_ASSEMBLER_IA32_H_
38 #define V8_IA32_ASSEMBLER_IA32_H_ 38 #define V8_IA32_ASSEMBLER_IA32_H_
39 39
40 #include "serialize.h" 40 #include "serialize.h"
41 41
42 namespace v8 { 42 namespace v8 {
43 namespace internal { 43 namespace internal {
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57 // 57 //
58 // 3) By not using an enum, we are possibly preventing the compiler from 58 // 3) By not using an enum, we are possibly preventing the compiler from
59 // doing certain constant folds, which may significantly reduce the 59 // doing certain constant folds, which may significantly reduce the
60 // code generated for some assembly instructions (because they boil down 60 // code generated for some assembly instructions (because they boil down
61 // to a few constants). If this is a problem, we could change the code 61 // to a few constants). If this is a problem, we could change the code
62 // such that we use an enum in optimized mode, and the struct in debug 62 // such that we use an enum in optimized mode, and the struct in debug
63 // mode. This way we get the compile-time error checking in debug mode 63 // mode. This way we get the compile-time error checking in debug mode
64 // and best performance in optimized code. 64 // and best performance in optimized code.
65 // 65 //
66 struct Register { 66 struct Register {
67 static const int kNumAllocatableRegisters = 5; 67 static const int kNumAllocatableRegisters = 6;
68 static const int kNumRegisters = 8; 68 static const int kNumRegisters = 8;
69 69
70 static int ToAllocationIndex(Register reg) { 70 static inline const char* AllocationIndexToString(int index);
71 ASSERT(reg.code() < 4 || reg.code() == 7);
72 return (reg.code() == 7) ? 4 : reg.code();
73 }
74 71
75 static Register FromAllocationIndex(int index) { 72 static inline int ToAllocationIndex(Register reg);
76 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
77 return (index == 4) ? from_code(7) : from_code(index);
78 }
79 73
80 static const char* AllocationIndexToString(int index) { 74 static inline Register FromAllocationIndex(int index);
81 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
82 const char* const names[] = {
83 "eax",
84 "ecx",
85 "edx",
86 "ebx",
87 "edi"
88 };
89 return names[index];
90 }
91 75
92 static Register from_code(int code) { 76 static Register from_code(int code) {
93 Register r = { code }; 77 Register r = { code };
94 return r; 78 return r;
95 } 79 }
96 bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } 80 bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; }
97 bool is(Register reg) const { return code_ == reg.code_; } 81 bool is(Register reg) const { return code_ == reg.code_; }
98 // eax, ebx, ecx and edx are byte registers, the rest are not. 82 // eax, ebx, ecx and edx are byte registers, the rest are not.
99 bool is_byte_register() const { return code_ <= 3; } 83 bool is_byte_register() const { return code_ <= 3; }
100 int code() const { 84 int code() const {
101 ASSERT(is_valid()); 85 ASSERT(is_valid());
102 return code_; 86 return code_;
103 } 87 }
104 int bit() const { 88 int bit() const {
105 ASSERT(is_valid()); 89 ASSERT(is_valid());
106 return 1 << code_; 90 return 1 << code_;
107 } 91 }
108 92
109 // Unfortunately we can't make this private in a struct. 93 // Unfortunately we can't make this private in a struct.
110 int code_; 94 int code_;
111 }; 95 };
112 96
97
113 const Register eax = { 0 }; 98 const Register eax = { 0 };
114 const Register ecx = { 1 }; 99 const Register ecx = { 1 };
115 const Register edx = { 2 }; 100 const Register edx = { 2 };
116 const Register ebx = { 3 }; 101 const Register ebx = { 3 };
117 const Register esp = { 4 }; 102 const Register esp = { 4 };
118 const Register ebp = { 5 }; 103 const Register ebp = { 5 };
119 const Register esi = { 6 }; 104 const Register esi = { 6 };
120 const Register edi = { 7 }; 105 const Register edi = { 7 };
121 const Register no_reg = { -1 }; 106 const Register no_reg = { -1 };
122 107
123 108
109 inline const char* Register::AllocationIndexToString(int index) {
110 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
111 // This is the mapping of allocation indices to registers.
112 const char* const kNames[] = { "eax", "ecx", "edx", "ebx", "esi", "edi" };
113 return kNames[index];
114 }
115
116
117 inline int Register::ToAllocationIndex(Register reg) {
118 ASSERT(reg.is_valid() && !reg.is(esp) && !reg.is(ebp));
119 return (reg.code() >= 6) ? reg.code() - 2 : reg.code();
120 }
121
122
123 inline Register Register::FromAllocationIndex(int index) {
124 ASSERT(index >= 0 && index < kNumAllocatableRegisters);
125 return (index >= 4) ? from_code(index + 2) : from_code(index);
126 }
127
128
124 struct XMMRegister { 129 struct XMMRegister {
125 static const int kNumAllocatableRegisters = 7; 130 static const int kNumAllocatableRegisters = 7;
126 static const int kNumRegisters = 8; 131 static const int kNumRegisters = 8;
127 132
128 static int ToAllocationIndex(XMMRegister reg) { 133 static int ToAllocationIndex(XMMRegister reg) {
129 ASSERT(reg.code() != 0); 134 ASSERT(reg.code() != 0);
130 return reg.code() - 1; 135 return reg.code() - 1;
131 } 136 }
132 137
133 static XMMRegister FromAllocationIndex(int index) { 138 static XMMRegister FromAllocationIndex(int index) {
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1080 private: 1085 private:
1081 Assembler* assembler_; 1086 Assembler* assembler_;
1082 #ifdef DEBUG 1087 #ifdef DEBUG
1083 int space_before_; 1088 int space_before_;
1084 #endif 1089 #endif
1085 }; 1090 };
1086 1091
1087 } } // namespace v8::internal 1092 } } // namespace v8::internal
1088 1093
1089 #endif // V8_IA32_ASSEMBLER_IA32_H_ 1094 #endif // V8_IA32_ASSEMBLER_IA32_H_
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