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Unified Diff: src/x64/assembler-x64.h

Issue 6366010: X64 Crankshaft: Added a bunch of operations. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge/build-x64
Patch Set: Created 9 years, 11 months ago
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Index: src/x64/assembler-x64.h
diff --git a/src/x64/assembler-x64.h b/src/x64/assembler-x64.h
index 890cd8ac5bec1d22d566cc0bbcb111fed678dc4c..21c9157d0f2ac8e759644c0d380688644d8e4537 100644
--- a/src/x64/assembler-x64.h
+++ b/src/x64/assembler-x64.h
@@ -153,6 +153,7 @@ struct Register {
// Unfortunately we can't make this private in a struct when initializing
// by assignment.
int code_;
+
private:
static const int registerCodeByAllocationIndex[kNumAllocatableRegisters];
static const int allocationIndexByRegisterCode[kNumRegisters];
@@ -390,6 +391,32 @@ class Operand BASE_EMBEDDED {
// this must not overflow.
Operand(const Operand& base, int32_t offset);
+ // Checks whether either base or index register is the given reg.
+ // Does not check the "reg" part of the Operand.
+ bool depends_on_register(Register reg) const {
William Hesse 2011/01/24 16:25:27 Could you call it address_uses_register() ?
Lasse Reichstein 2011/01/25 10:13:27 It should probably even be AddressUsesRegister. An
+ int code = reg.code();
+ ASSERT((buf_[0] & 0xC0) != 0xC0); // Always a memory operand.
+ int base_bits = buf_[0] & 0x07;
+ int base_code;
+ if (base_bits == 0x04) {
+ // SIB byte present in buf_[1].
+ // Check the index register from the SIB byte + REX.X prefix.
+ int index_code = ((buf_[1] >> 3) & 0x07) | ((rex_ & 0x02) << 2);
+ // Index code (including REX.X) of 0x04 (esp) means no index register.
Rico 2011/01/25 07:13:28 esp -> rsp
Lasse Reichstein 2011/01/25 10:13:27 Done.
+ if (index_code != 0x04 && index_code == code) return true;
Rico 2011/01/25 07:13:28 What about using rsp.code() instead of 0x04
Lasse Reichstein 2011/01/25 10:13:27 Done, and also rbp.code() instead of 0x05 later.
+ // Add REX.B to base_bits to get base register code.
+ base_bits = (buf_[1] & 0x07) | ((rex_ & 0x01) << 3);
+ base_code = base_bits;
+ } else {
+ // Add REX.B to base_bits to get base register code.
+ base_code = base_bits | ((rex_ & 0x01) << 3);
+ }
+ // Base register is unused if mod = 0 and r/m = 5 (ebp).
+ // Comparison uses REX.B if using the SIB byte, otherwise not.
William Hesse 2011/01/24 16:25:27 instead of "if using the SIB byte", say "if base_c
Lasse Reichstein 2011/01/25 10:13:27 I have rewritten it so the two branches have no sh
+ if (base_bits == 0x05 && ((buf_[0] & 0xC0) == 0)) return false;
+ return code == base_code;
+ }
+
private:
byte rex_;
byte buf_[6];
@@ -821,6 +848,10 @@ class Assembler : public Malloced {
arithmetic_op_32(0x23, dst, src);
}
+ void andl(Register dst, const Operand& src) {
William Hesse 2011/01/24 16:25:27 Add to disassembler.
Lasse Reichstein 2011/01/25 10:13:27 This one is already there (it's one of the fairly
+ arithmetic_op_32(0x23, dst, src);
+ }
+
void andb(Register dst, Immediate src) {
immediate_arithmetic_op_8(0x4, dst, src);
}
@@ -1205,6 +1236,9 @@ class Assembler : public Malloced {
void movsd(XMMRegister dst, XMMRegister src);
void movsd(XMMRegister dst, const Operand& src);
+ void movdqa(const Operand& dst, XMMRegister src);
William Hesse 2011/01/24 16:25:27 Add to disassembler.
Lasse Reichstein 2011/01/25 10:13:27 Done.
+ void movdqa(XMMRegister dst, const Operand& src);
+
void movss(XMMRegister dst, const Operand& src);
void movss(const Operand& dst, XMMRegister src);
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