X64 Crankshaft: Added a bunch of operations.

src/x64/macro-assembler-x64.cc

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 357 matching lines @@
   // there is no difference in using either key.
   Integer32ToSmi(index, hash);
 }
 
 
 void MacroAssembler::CallRuntime(Runtime::FunctionId id, int num_arguments) {
   CallRuntime(Runtime::FunctionForId(id), num_arguments);
 }
 
 
+void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) {
+  Runtime::Function* function = Runtime::FunctionForId(id);
+  Set(rax, function->nargs);
+  movq(rbx, ExternalReference(function));
+  CEntryStub ces(1);
+  ces.SaveDoubles();
+  CallStub(&ces);
+}
+
+
 MaybeObject* MacroAssembler::TryCallRuntime(Runtime::FunctionId id,
                                             int num_arguments) {
   return TryCallRuntime(Runtime::FunctionForId(id), num_arguments);
 }
 
 
 void MacroAssembler::CallRuntime(Runtime::Function* f, int num_arguments) {
   // If the expected number of arguments of the runtime function is
   // constant, we check that the actual number of arguments match the
   // expectation.
@@ skipping 572 matching lines @@
 
 
 Condition MacroAssembler::CheckUInteger32ValidSmiValue(Register src) {
   // An unsigned 32-bit integer value is valid as long as the high bit
   // is not set.
   testl(src, src);
   return positive;
 }
 
 
+void MacroAssembler::CheckSmiToIndicator(Register dst, Register src) {
+  if (dst.is(src)) {
+    andl(dst, Immediate(kSmiTagMask));
+  } else {
+    movl(dst, Immediate(kSmiTagMask));
+    andl(dst, src);
+  }
+}
+
+
+void MacroAssembler::CheckSmiToIndicator(Register dst, const Operand& src) {
+  if (!(src.depends_on_register(dst))) {
+    movl(dst, Immediate(kSmiTagMask));
+    andl(dst, src);
+  } else {
+    movl(dst, src);

[William Hesse, 2011/01/24 16:25:27]

Why is the second choice worst than the first.  Why not just do the second
choice all the time?

[Lasse Reichstein, 2011/01/25 10:13:27]

The second choice has a following operation that depends on a memory load. The
first choice's movl is independent of other operations and can be hoisted to
before the result is ready in src, leaving only the memory operation.
So, I'm expecting marginally better parallelization.
It might be pure speculation though.

+    andl(dst, Immediate(kSmiTagMask));
+  }
+}
+
+
 void MacroAssembler::SmiAddConstant(Register dst, Register src, Smi* constant) {
   if (constant->value() == 0) {
     if (!dst.is(src)) {
       movq(dst, src);
     }
     return;
   } else if (dst.is(src)) {
     ASSERT(!dst.is(kScratchRegister));
     switch (constant->value()) {
       case 1:
@@ skipping 440 matching lines @@
   pop(r8);
   pop(rdi);
   pop(rsi);
   pop(rbx);
   pop(rdx);
   pop(rcx);
   pop(rax);
 }
 
 
+void MacroAssembler::Dropad() {
+  const int kRegistersPushedByPushad = 11;
+  addq(rsp, Immediate(kRegistersPushedByPushad * kPointerSize));
+}
+
+
+// Order general registers are pushed by Pushad:
+// rax, rcx, rdx, rbx, rsi, rdi, r8, r9, r11, r12, r14.
+int MacroAssembler::kSafepointPushRegisterIndices[Register::kNumRegisters] = {
+    0,
+    1,
+    2,
+    3,
+    -1,
+    -1,
+    4,
+    5,
+    6,
+    7,
+    -1,
+    8,
+    9,
+    -1,
+    10,
+    -1
+};
+
+
 void MacroAssembler::PushTryHandler(CodeLocation try_location,
                                     HandlerType type) {
   // Adjust this code if not the case.
   ASSERT(StackHandlerConstants::kSize == 4 * kPointerSize);
 
   // The pc (return address) is already on TOS.  This code pushes state,
   // frame pointer and current handler.  Check that they are expected
   // next on the stack, in that order.
   ASSERT_EQ(StackHandlerConstants::kStateOffset,
             StackHandlerConstants::kPCOffset - kPointerSize);
@@ skipping 328 matching lines @@
     movq(r14, rax);  // Backup rax before we use it.
   }
 
   movq(rax, rbp);
   store_rax(c_entry_fp_address);
   movq(rax, rsi);
   store_rax(context_address);
 }
 
 
-void MacroAssembler::EnterExitFrameEpilogue(int arg_stack_space) {
+void MacroAssembler::EnterExitFrameEpilogue(int arg_stack_space,
+                                            bool save_doubles) {
 #ifdef _WIN64
   const int kShaddowSpace = 4;

[William Hesse, 2011/01/24 16:25:27]

Shadow has one d.  What is shadow space?

[Lasse Reichstein, 2011/01/25 10:13:27]

I believe it's the space reserved on the stack for the register-passed arguments
in the Win64 calling convention.
The name 'shadow space' is used by the MSDN documentation, e.g.,
http://msdn.microsoft.com/en-us/library/zthk2dkh.aspx
The double-d is inexcusable though.

   arg_stack_space += kShaddowSpace;
 #endif
+  // Optionally save all XMM registers.
+  if (save_doubles) {
+    CpuFeatures::Scope scope(SSE2);
+    int space = XMMRegister::kNumRegisters * kDoubleSize +
+        arg_stack_space * kPointerSize;
+    subq(rsp, Immediate(space));
+    int offset = -2 * kPointerSize;
+    for (int i = 0; i < XMMRegister::kNumAllocatableRegisters; i++) {
+      XMMRegister reg = XMMRegister::FromAllocationIndex(i);
+      movdqa(Operand(rbp, offset - ((i + 1) * kDoubleSize)), reg);

[William Hesse, 2011/01/24 16:25:27]

How do we know that we are 16-byte aligned here?  I think we are only 8-byte
aligned.  The frame is aligned below.

[Lasse Reichstein, 2011/01/25 10:13:27]

Ack, I don't. We are only 8-byte aligned. Using movdqa is bad. Will change to
movsd.

+    }
+  } else if (arg_stack_space > 0) {
+    subq(rsp, Immediate(arg_stack_space * kPointerSize));

[William Hesse, 2011/01/24 16:25:27]

This code is duplicated.  It seems to run twice- a bad idea.

[Lasse Reichstein, 2011/01/25 10:13:27]

Argh, removed.

+  }
+
   if (arg_stack_space > 0) {
     subq(rsp, Immediate(arg_stack_space * kPointerSize));
   }
 
   // Get the required frame alignment for the OS.
   static const int kFrameAlignment = OS::ActivationFrameAlignment();
   if (kFrameAlignment > 0) {
     ASSERT(IsPowerOf2(kFrameAlignment));
     movq(kScratchRegister, Immediate(-kFrameAlignment));
     and_(rsp, kScratchRegister);
   }
 
   // Patch the saved entry sp.
   movq(Operand(rbp, ExitFrameConstants::kSPOffset), rsp);
 }
 
 
-void MacroAssembler::EnterExitFrame(int arg_stack_space) {
+void MacroAssembler::EnterExitFrame(int arg_stack_space, bool save_doubles) {
   EnterExitFramePrologue(true);
 
   // Setup argv in callee-saved register r12. It is reused in LeaveExitFrame,
   // so it must be retained across the C-call.
   int offset = StandardFrameConstants::kCallerSPOffset - kPointerSize;
   lea(r12, Operand(rbp, r14, times_pointer_size, offset));
 
-  EnterExitFrameEpilogue(arg_stack_space);
+  EnterExitFrameEpilogue(arg_stack_space, save_doubles);
 }
 
 
 void MacroAssembler::EnterApiExitFrame(int arg_stack_space) {
   EnterExitFramePrologue(false);
-  EnterExitFrameEpilogue(arg_stack_space);
+  EnterExitFrameEpilogue(arg_stack_space, false);
 }
 
 
-void MacroAssembler::LeaveExitFrame() {
+void MacroAssembler::LeaveExitFrame(bool save_doubles) {
   // Registers:
   // r12 : argv
-
+  if (save_doubles) {
+    int offset = -2 * kPointerSize;
+    for (int i = 0; i < XMMRegister::kNumAllocatableRegisters; i++) {
+      XMMRegister reg = XMMRegister::FromAllocationIndex(i);
+      movdqa(reg, Operand(rbp, offset - ((i + 1) * kDoubleSize)));

[William Hesse, 2011/01/24 16:25:27]

Is this the right rbp here?

[Lasse Reichstein, 2011/01/25 10:13:27]

It seems so. It's equivalent to the ia32 code.

+    }
+  }
   // Get the return address from the stack and restore the frame pointer.
   movq(rcx, Operand(rbp, 1 * kPointerSize));
   movq(rbp, Operand(rbp, 0 * kPointerSize));
 
-  // Pop everything up to and including the arguments and the receiver
+  // Drop everything up to and including the arguments and the receiver
   // from the caller stack.
   lea(rsp, Operand(r12, 1 * kPointerSize));
 
   // Push the return address to get ready to return.
   push(rcx);
 
   LeaveExitFrameEpilogue();
 }
 
 
@@ skipping 548 matching lines @@
   CPU::FlushICache(address_, size_);
 
   // Check that the code was patched as expected.
   ASSERT(masm_.pc_ == address_ + size_);
   ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_X64