Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(159)

Side by Side Diff: src/arm/assembler-arm.h

Issue 6347007: ARM: Implement Math.abs in lithium code generator for the integer and (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 9 years, 11 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | src/arm/frames-arm.h » ('j') | src/arm/lithium-codegen-arm.cc » ('J')
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 354 matching lines...) Expand 10 before | Expand all | Expand 10 after
365 p9 = 9, 365 p9 = 9,
366 p10 = 10, 366 p10 = 10,
367 p11 = 11, 367 p11 = 11,
368 p12 = 12, 368 p12 = 12,
369 p13 = 13, 369 p13 = 13,
370 p14 = 14, 370 p14 = 14,
371 p15 = 15 371 p15 = 15
372 }; 372 };
373 373
374 374
375 // Index of register used when pushing all registers.
376 // Order of registers on the stack: r0, r1, ..., r11
377 inline int SpIndexForPushAll(Register reg) {
Søren Thygesen Gjesse 2011/01/20 08:03:22 We have SafepointRegisterSlot in macro assembler w
378 ASSERT(reg.code() < Register::kNumAllocatableRegisters);
379 return reg.code();
380 }
381
382
375 // Condition field in instructions. 383 // Condition field in instructions.
376 enum Condition { 384 enum Condition {
377 // any value < 0 is considered no_condition 385 // any value < 0 is considered no_condition
378 no_condition = -1, 386 no_condition = -1,
379 387
380 eq = 0 << 28, // Z set equal. 388 eq = 0 << 28, // Z set equal.
381 ne = 1 << 28, // Z clear not equal. 389 ne = 1 << 28, // Z clear not equal.
382 nz = 1 << 28, // Z clear not zero. 390 nz = 1 << 28, // Z clear not zero.
383 cs = 2 << 28, // C set carry set. 391 cs = 2 << 28, // C set carry set.
384 hs = 2 << 28, // C set unsigned higher or same. 392 hs = 2 << 28, // C set unsigned higher or same.
(...skipping 1037 matching lines...) Expand 10 before | Expand all | Expand 10 after
1422 public: 1430 public:
1423 explicit EnsureSpace(Assembler* assembler) { 1431 explicit EnsureSpace(Assembler* assembler) {
1424 assembler->CheckBuffer(); 1432 assembler->CheckBuffer();
1425 } 1433 }
1426 }; 1434 };
1427 1435
1428 1436
1429 } } // namespace v8::internal 1437 } } // namespace v8::internal
1430 1438
1431 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1439 #endif // V8_ARM_ASSEMBLER_ARM_H_
OLDNEW
« no previous file with comments | « no previous file | src/arm/frames-arm.h » ('j') | src/arm/lithium-codegen-arm.cc » ('J')

Powered by Google App Engine
This is Rietveld 408576698