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Issue 6346009: Fix the ARM simulator's stop support and add conditional breakpoint.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 11 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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443 } 443 }
444 } else if (strcmp(cmd, "flags") == 0) { 444 } else if (strcmp(cmd, "flags") == 0) {
445 PrintF("N flag: %d; ", sim_->n_flag_); 445 PrintF("N flag: %d; ", sim_->n_flag_);
446 PrintF("Z flag: %d; ", sim_->z_flag_); 446 PrintF("Z flag: %d; ", sim_->z_flag_);
447 PrintF("C flag: %d; ", sim_->c_flag_); 447 PrintF("C flag: %d; ", sim_->c_flag_);
448 PrintF("V flag: %d\n", sim_->v_flag_); 448 PrintF("V flag: %d\n", sim_->v_flag_);
449 PrintF("INVALID OP flag: %d; ", sim_->inv_op_vfp_flag_); 449 PrintF("INVALID OP flag: %d; ", sim_->inv_op_vfp_flag_);
450 PrintF("DIV BY ZERO flag: %d; ", sim_->div_zero_vfp_flag_); 450 PrintF("DIV BY ZERO flag: %d; ", sim_->div_zero_vfp_flag_);
451 PrintF("OVERFLOW flag: %d; ", sim_->overflow_vfp_flag_); 451 PrintF("OVERFLOW flag: %d; ", sim_->overflow_vfp_flag_);
452 PrintF("UNDERFLOW flag: %d; ", sim_->underflow_vfp_flag_); 452 PrintF("UNDERFLOW flag: %d; ", sim_->underflow_vfp_flag_);
453 PrintF("INEXACT flag: %d; ", sim_->inexact_vfp_flag_); 453 PrintF("INEXACT flag: %d;\n", sim_->inexact_vfp_flag_);
454 } else if (strcmp(cmd, "stop") == 0) { 454 } else if (strcmp(cmd, "stop") == 0) {
455 int32_t value; 455 int32_t value;
456 intptr_t stop_pc = sim_->get_pc() - 2 * Instr::kInstrSize; 456 intptr_t stop_pc = sim_->get_pc() - 2 * Instr::kInstrSize;
457 Instr* stop_instr = reinterpret_cast<Instr*>(stop_pc); 457 Instr* stop_instr = reinterpret_cast<Instr*>(stop_pc);
458 Instr* msg_address = 458 Instr* msg_address =
459 reinterpret_cast<Instr*>(stop_pc + Instr::kInstrSize); 459 reinterpret_cast<Instr*>(stop_pc + Instr::kInstrSize);
460 if ((argc == 2) && (strcmp(arg1, "unstop") == 0)) { 460 if ((argc == 2) && (strcmp(arg1, "unstop") == 0)) {
461 // Remove the current stop. 461 // Remove the current stop.
462 if (sim_->isStopInstruction(stop_instr)) { 462 if (sim_->isStopInstruction(stop_instr)) {
463 stop_instr->SetInstructionBits(kNopInstr); 463 stop_instr->SetInstructionBits(kNopInstr);
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2895 } 2895 }
2896 case 7: { 2896 case 7: {
2897 DecodeType7(instr); 2897 DecodeType7(instr);
2898 break; 2898 break;
2899 } 2899 }
2900 default: { 2900 default: {
2901 UNIMPLEMENTED(); 2901 UNIMPLEMENTED();
2902 break; 2902 break;
2903 } 2903 }
2904 } 2904 }
2905 // If the instruction is a non taken conditional stop, we need to skip the
2906 // inlined message address.
2907 } else if (instr->IsStop()) {
2908 set_pc(get_pc() + 2 * Instr::kInstrSize);
2905 } 2909 }
2906 if (!pc_modified_) { 2910 if (!pc_modified_) {
2907 set_register(pc, reinterpret_cast<int32_t>(instr) + Instr::kInstrSize); 2911 set_register(pc, reinterpret_cast<int32_t>(instr) + Instr::kInstrSize);
2908 } 2912 }
2909 } 2913 }
2910 2914
2911 2915
2912 void Simulator::Execute() { 2916 void Simulator::Execute() {
2913 // Get the PC to simulate. Cannot use the accessor here as we need the 2917 // Get the PC to simulate. Cannot use the accessor here as we need the
2914 // raw PC value and not the one used as input to arithmetic instructions. 2918 // raw PC value and not the one used as input to arithmetic instructions.
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3046 uintptr_t address = *stack_slot; 3050 uintptr_t address = *stack_slot;
3047 set_register(sp, current_sp + sizeof(uintptr_t)); 3051 set_register(sp, current_sp + sizeof(uintptr_t));
3048 return address; 3052 return address;
3049 } 3053 }
3050 3054
3051 } } // namespace assembler::arm 3055 } } // namespace assembler::arm
3052 3056
3053 #endif // USE_SIMULATOR 3057 #endif // USE_SIMULATOR
3054 3058
3055 #endif // V8_TARGET_ARCH_ARM 3059 #endif // V8_TARGET_ARCH_ARM
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