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Issue 6338019: ARM: Try to fix broken commit r6504... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 9 years, 11 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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2621 ASSERT(operands_type_ == TRBinaryOpIC::STRING); 2621 ASSERT(operands_type_ == TRBinaryOpIC::STRING);
2622 ASSERT(op_ == Token::ADD); 2622 ASSERT(op_ == Token::ADD);
2623 // Try to add arguments as strings, otherwise, transition to the generic 2623 // Try to add arguments as strings, otherwise, transition to the generic
2624 // TRBinaryOpIC type. 2624 // TRBinaryOpIC type.
2625 GenerateAddStrings(masm); 2625 GenerateAddStrings(masm);
2626 GenerateTypeTransition(masm); 2626 GenerateTypeTransition(masm);
2627 } 2627 }
2628 2628
2629 2629
2630 void TypeRecordingBinaryOpStub::GenerateInt32Stub(MacroAssembler* masm) { 2630 void TypeRecordingBinaryOpStub::GenerateInt32Stub(MacroAssembler* masm) {
2631 ASSERT(op_ == Token::ADD || op_ == Token::SUB || op_ == Token::SUB); 2631 ASSERT(op_ == Token::ADD || op_ == Token::SUB || op_ == Token::MUL);
2632 2632
2633 ASSERT(operands_type_ == TRBinaryOpIC::INT32); 2633 ASSERT(operands_type_ == TRBinaryOpIC::INT32);
2634 2634
2635 GenerateTypeTransition(masm); 2635 GenerateTypeTransition(masm);
2636 } 2636 }
2637 2637
2638 2638
2639 void TypeRecordingBinaryOpStub::GenerateHeapNumberStub(MacroAssembler* masm) { 2639 void TypeRecordingBinaryOpStub::GenerateHeapNumberStub(MacroAssembler* masm) {
2640 ASSERT(op_ == Token::ADD || op_ == Token::SUB || op_ == Token::MUL); 2640 ASSERT(op_ == Token::ADD || op_ == Token::SUB || op_ == Token::MUL);
2641 2641
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2766 2766
2767 void TypeRecordingBinaryOpStub::GenerateCallRuntime(MacroAssembler* masm) { 2767 void TypeRecordingBinaryOpStub::GenerateCallRuntime(MacroAssembler* masm) {
2768 GenerateRegisterArgsPush(masm); 2768 GenerateRegisterArgsPush(masm);
2769 switch (op_) { 2769 switch (op_) {
2770 case Token::ADD: 2770 case Token::ADD:
2771 __ InvokeBuiltin(Builtins::ADD, JUMP_JS); 2771 __ InvokeBuiltin(Builtins::ADD, JUMP_JS);
2772 break; 2772 break;
2773 case Token::SUB: 2773 case Token::SUB:
2774 __ InvokeBuiltin(Builtins::SUB, JUMP_JS); 2774 __ InvokeBuiltin(Builtins::SUB, JUMP_JS);
2775 break; 2775 break;
2776 case Token::MUL:
2777 __ InvokeBuiltin(Builtins::MUL, JUMP_JS);
2778 break;
2776 default: 2779 default:
2777 UNREACHABLE(); 2780 UNREACHABLE();
2778 } 2781 }
2779 } 2782 }
2780 2783
2781 2784
2782 void TypeRecordingBinaryOpStub::GenerateHeapResultAllocation( 2785 void TypeRecordingBinaryOpStub::GenerateHeapResultAllocation(
2783 MacroAssembler* masm, 2786 MacroAssembler* masm,
2784 Register result, 2787 Register result,
2785 Register heap_number_map, 2788 Register heap_number_map,
(...skipping 2907 matching lines...) Expand 10 before | Expand all | Expand 10 after
5693 __ pop(r1); 5696 __ pop(r1);
5694 __ Jump(r2); 5697 __ Jump(r2);
5695 } 5698 }
5696 5699
5697 5700
5698 #undef __ 5701 #undef __
5699 5702
5700 } } // namespace v8::internal 5703 } } // namespace v8::internal
5701 5704
5702 #endif // V8_TARGET_ARCH_ARM 5705 #endif // V8_TARGET_ARCH_ARM
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