Add custom typed ICs for pixel array loads.

src/arm/ic-arm.cc

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@@ skipping 1356 matching lines @@
 
   // Perform tail call to the entry.
   __ TailCallExternalReference(ExternalReference(
         IC_Utility(kKeyedLoadPropertyWithInterceptor)), 2, 1);
 
   __ bind(&slow);
   GenerateMiss(masm);
 }
 
 
+void KeyedLoadIC::GeneratePixelArray(MacroAssembler* masm) {
+  // ---------- S t a t e --------------
+  //  -- lr     : return address
+  //  -- r0     : key
+  //  -- r1     : receiver
+  // -----------------------------------
+
+  // Register usage.
+  Register key = r0;
+  Register receiver = r1;
+  Register elements = r2;
+  Register elements_map = r3;
+  Register index = r4;
+
+  Label slow;
+
+  // Receiver must not be smi and its element map must be a pixel array.
+  __ BranchOnSmi(receiver, &slow);
+  __ ldr(elements, FieldMemOperand(r1, JSObject::kElementsOffset));

[Mads Ager (chromium), 2011/01/25 14:49:17]

We need to check that the receiver is a JSObject before we can load the
elements. When the object is not a smi it has to be a heap object. However,
there are heap objects that have no elements array (such as value objects and
undefined and null).

I think you need to use GenerateKeyedReceiverCheck or something like that. We
could also get an object that requires access checks or has a keyed interceptor.

[danno, 2011/01/25 20:56:29]

Done.

+  __ LoadRoot(ip, Heap::kPixelArrayMapRootIndex);
+  __ ldr(elements_map, FieldMemOperand(elements, JSObject::kMapOffset));
+  __ cmp(elements_map, ip);
+  __ b(ne, &slow);
+
+  // Key must be a smi that is in range of the pixel array.
+  __ BranchOnNotSmi(key, &slow);
+  __ ldr(ip, FieldMemOperand(elements, PixelArray::kLengthOffset));

[Mads Ager (chromium), 2011/01/25 14:49:17]

Since we have enough register here, I would prefer not to use ip. Using ip
always makes me a bit nervous because it is occasionally clobered by the
macroassembler.

[danno, 2011/01/25 20:56:29]

Done.

+  __ mov(index, Operand(key, ASR, kSmiTagSize));
+  __ cmp(index, ip);
+  __ b(hs, &slow);
+
+  // Perform the indexed load and tag it as a smi. 
+  __ ldr(ip, FieldMemOperand(elements, PixelArray::kExternalPointerOffset));

[Mads Ager (chromium), 2011/01/25 14:49:17]

Ditto for using ip.

[danno, 2011/01/25 20:56:29]

Done.

+  __ ldrb(r2, MemOperand(ip, index));
+  __ mov(r0, Operand(r2, LSL, kSmiTagSize));  // Tag result as smi.
+  __ Ret();
+
+  __ bind(&slow);
+  GenerateMiss(masm);
+}
+
+
 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
   // ---------- S t a t e --------------
   //  -- r0     : value
   //  -- r1     : key
   //  -- r2     : receiver
   //  -- lr     : return address
   // -----------------------------------
 
   // Push receiver, key and value for runtime call.
   __ Push(r2, r1, r0);
@@ skipping 317 matching lines @@
 
 
 void PatchInlinedSmiCode(Address address) {
   UNIMPLEMENTED();
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM