Add custom typed ICs for pixel array loads.

src/arm/ic-arm.cc

 // Copyright 2006-2008 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1356 matching lines @@
 
   // Perform tail call to the entry.
   __ TailCallExternalReference(ExternalReference(
         IC_Utility(kKeyedLoadPropertyWithInterceptor)), 2, 1);
 
   __ bind(&slow);
   GenerateMiss(masm);
 }
 
 
+void KeyedLoadIC::GeneratePixelArray(MacroAssembler* masm) {
+  // ---------- S t a t e --------------
+  //  -- lr     : return address
+  //  -- r0     : key
+  //  -- r1     : receiver
+  // -----------------------------------
+
+  // Register usage.
+  Register key = r0;
+  Register receiver = r1;
+  Register elements = r2;
+  Register elements_map = r3;
+  Register index = r4;
+  Register scratch1 = r5;
+  Register scratch2 = r6;
+
+  Label slow;
+
+  // Verify that it's safe to access the receiver's elements.
+  GenerateKeyedLoadReceiverCheck(
+      masm, receiver, scratch1, scratch2,
+      Map::kHasIndexedInterceptor, &slow);
+
+  // Verify that the receiver has pixel array elements.
+  __ ldr(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
+  __ LoadRoot(scratch1, Heap::kPixelArrayMapRootIndex);
+  __ ldr(elements_map, FieldMemOperand(elements, JSObject::kMapOffset));
+  __ cmp(elements_map, scratch1);
+  __ b(ne, &slow);
+
+  // Key must be a smi that is in the range of the pixel array.
+  __ BranchOnNotSmi(key, &slow);

[Søren Thygesen Gjesse, 2011/01/26 21:35:17]

This has changed to JumpIfNotSmi.

[danno, 2011/01/28 10:32:08]

Done.

+  __ ldr(scratch1, FieldMemOperand(elements, PixelArray::kLengthOffset));
+  __ mov(index, Operand(key, ASR, kSmiTagSize));  // Untag index

[Søren Thygesen Gjesse, 2011/01/26 21:35:17]

There is a SmiUntag instruction in the macro assembler which takes two
registres.

[danno, 2011/01/28 10:32:08]

Done.

+  __ cmp(index, scratch1);
+  __ b(hs, &slow);
+
+  // Perform the indexed load and tag the result as a smi.
+  __ ldr(scratch1,
+         FieldMemOperand(elements, PixelArray::kExternalPointerOffset));
+  __ ldrb(scratch2, MemOperand(scratch1, index));
+  __ mov(r0, Operand(scratch2, LSL, kSmiTagSize));  // Tag result as smi.

[Søren Thygesen Gjesse, 2011/01/26 21:35:17]

There is also a SmiTag which takes two registers, but you could just load it
into r0 and use SmiTag on one register.

[danno, 2011/01/28 10:32:08]

Done.

+  __ Ret();
+
+  __ bind(&slow);
+  GenerateMiss(masm);
+}
+
+
 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
   // ---------- S t a t e --------------
   //  -- r0     : value
   //  -- r1     : key
   //  -- r2     : receiver
   //  -- lr     : return address
   // -----------------------------------
 
   // Push receiver, key and value for runtime call.
   __ Push(r2, r1, r0);
@@ skipping 317 matching lines @@
 
 
 void PatchInlinedSmiCode(Address address) {
   UNIMPLEMENTED();
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM