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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1950 emit(cond | 0xD0*B20 | ip.code()*B16 | src.code()*B12 | 0xB*B8); | 1950 emit(cond | 0xD0*B20 | ip.code()*B16 | src.code()*B12 | 0xB*B8); |
1951 } | 1951 } |
1952 } | 1952 } |
1953 | 1953 |
1954 | 1954 |
1955 void Assembler::vstr(const DwVfpRegister src, | 1955 void Assembler::vstr(const DwVfpRegister src, |
1956 const MemOperand& operand, | 1956 const MemOperand& operand, |
1957 const Condition cond) { | 1957 const Condition cond) { |
1958 ASSERT(!operand.rm().is_valid()); | 1958 ASSERT(!operand.rm().is_valid()); |
1959 ASSERT(operand.am_ == Offset); | 1959 ASSERT(operand.am_ == Offset); |
1960 vldr(src, operand.rn(), operand.offset(), cond); | 1960 vstr(src, operand.rn(), operand.offset(), cond); |
1961 } | 1961 } |
1962 | 1962 |
1963 | 1963 |
1964 void Assembler::vstr(const SwVfpRegister src, | 1964 void Assembler::vstr(const SwVfpRegister src, |
1965 const Register base, | 1965 const Register base, |
1966 int offset, | 1966 int offset, |
1967 const Condition cond) { | 1967 const Condition cond) { |
1968 // MEM(Rbase + offset) = SSrc. | 1968 // MEM(Rbase + offset) = SSrc. |
1969 // Instruction details available in ARM DDI 0406A, A8-786. | 1969 // Instruction details available in ARM DDI 0406A, A8-786. |
1970 // cond(31-28) | 1101(27-24)| U000(23-20) | Rbase(19-16) | | 1970 // cond(31-28) | 1101(27-24)| U000(23-20) | Rbase(19-16) | |
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2747 | 2747 |
2748 // Since a constant pool was just emitted, move the check offset forward by | 2748 // Since a constant pool was just emitted, move the check offset forward by |
2749 // the standard interval. | 2749 // the standard interval. |
2750 next_buffer_check_ = pc_offset() + kCheckConstInterval; | 2750 next_buffer_check_ = pc_offset() + kCheckConstInterval; |
2751 } | 2751 } |
2752 | 2752 |
2753 | 2753 |
2754 } } // namespace v8::internal | 2754 } } // namespace v8::internal |
2755 | 2755 |
2756 #endif // V8_TARGET_ARCH_ARM | 2756 #endif // V8_TARGET_ARCH_ARM |
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