[gcc] Replace rsp/rbp mov source with esp/ebp

gcc/gcc/config/i386/i386.md

Index: gcc/gcc/config/i386/i386.md
diff --git a/gcc/gcc/config/i386/i386.md b/gcc/gcc/config/i386/i386.md
index 1192ce660cca30b2e908dd0569f687f6dfd27d41..93223b29ebb7192f3c997a8b274cdd7f4b84a61e 100644
--- a/gcc/gcc/config/i386/i386.md
+++ b/gcc/gcc/config/i386/i386.md
@@ -2423,24 +2423,35 @@
 	return "mov{l}\t{%k1, %k0|%k0, %k1}";
       else if (which_alternative == 2)
 	return "movabs{q}\t{%1, %0|%0, %1}";
-      else if (!TARGET_NACL)
-	return "mov{q}\t{%1, %0|%0, %1}";
-      else if (REGNO (operands[0]) == SP_REG)
-	{
-	  if (REGNO (operands[1]) == BP_REG)
-	    return "mov{q}\t{%1, %0|%0, %1}";
-	  else
-	    return "naclrestsp\t{%k1, %%r15|%%r15, %k1}";
-	}
-      else if (REGNO (operands[0]) == BP_REG)
+      if (TARGET_NACL)
 	{
-	  if (REGNO (operands[1]) == SP_REG)
-	    return "mov{q}\t{%1, %0|%0, %1}";
-	  else
-	    return "naclrestbp\t{%k1, %%r15|%%r15, %k1}";
+	  /* Set RSP.  */
+	  if (REG_P (operands[0]) && REGNO (operands[0]) == SP_REG)
+	    if (!(REG_P (operands[1]) && REGNO (operands[1]) == BP_REG))
+	      return "naclrestsp\t{%k1, %%r15|%%r15, %k1}";
+
+	  /* Set RBP.  */
+	  if (REG_P (operands[0]) && REGNO (operands[0]) == BP_REG)
+	    if (!(REG_P (operands[1]) && REGNO (operands[1]) == SP_REG))
+	      return "naclrestbp\t{%k1, %%r15|%%r15, %k1}";
+
+	  /* Get RSP.  */
+	  if (REG_P (operands[1]) && REGNO (operands[1]) == SP_REG)
+	    {
+	      gcc_assert (REG_P (operands[0]));
+	      if (REGNO (operands[0]) != BP_REG)
+		return "mov{l}\t{%k1, %k0|%k0, %k1}";
+	    }
+
+	  /* Get RBP.  */
+	  if (REG_P (operands[1]) && REGNO (operands[1]) == BP_REG)
+	    {
+	      gcc_assert (REG_P (operands[0]));
+	      if (REGNO (operands[0]) != SP_REG)
+		return "mov{l}\t{%k1, %k0|%k0, %k1}";
+	    }
 	}
-      else
-	return "mov{q}\t{%1, %0|%0, %1}";
+      return "mov{q}\t{%1, %0|%0, %1}";
     }
 }
   [(set (attr "type")