Index: gcc/gcc/config/i386/i386.md |
diff --git a/gcc/gcc/config/i386/i386.md b/gcc/gcc/config/i386/i386.md |
index 93223b29ebb7192f3c997a8b274cdd7f4b84a61e..59c02d088eda0544088f959cae833cd28ad15915 100644 |
--- a/gcc/gcc/config/i386/i386.md |
+++ b/gcc/gcc/config/i386/i386.md |
@@ -2435,21 +2435,19 @@ |
if (!(REG_P (operands[1]) && REGNO (operands[1]) == SP_REG)) |
return "naclrestbp\t{%k1, %%r15|%%r15, %k1}"; |
- /* Get RSP. */ |
+ /* Get RSP. |
+ This also truncated RSP when spilling? it to MEM, which should |
+ still work as fill will use naclrestsp. */ |
if (REG_P (operands[1]) && REGNO (operands[1]) == SP_REG) |
- { |
- gcc_assert (REG_P (operands[0])); |
- if (REGNO (operands[0]) != BP_REG) |
- return "mov{l}\t{%k1, %k0|%k0, %k1}"; |
- } |
+ if (!(REG_P (operands[0]) && REGNO (operands[0]) == BP_REG)) |
+ return "mov{l}\t{%k1, %k0|%k0, %k1}"; |
- /* Get RBP. */ |
+ /* Get RBP. |
+ This also truncated RBP when spilling? it to MEM, which should |
+ still work as fill will use naclrestbp. */ |
if (REG_P (operands[1]) && REGNO (operands[1]) == BP_REG) |
- { |
- gcc_assert (REG_P (operands[0])); |
- if (REGNO (operands[0]) != SP_REG) |
- return "mov{l}\t{%k1, %k0|%k0, %k1}"; |
- } |
+ if (!(REG_P (operands[0]) && REGNO (operands[0]) == SP_REG)) |
+ return "mov{l}\t{%k1, %k0|%k0, %k1}"; |
} |
return "mov{q}\t{%1, %0|%0, %1}"; |
} |
@@ -6009,7 +6007,23 @@ |
[(set (match_operand:DI 0 "register_operand" "=r") |
(match_operand:DI 1 "lea_address_operand" "T"))] |
"TARGET_64BIT" |
- "lea{q}\t{%Z1, %0|%0, %Z1}" |
+{ |
+ if (TARGET_NACL) |
+ { |
+ struct ix86_address parts; |
+ int ok; |
+ |
+ ok = ix86_lea_decompose_address (operands[1], &parts); |
+ gcc_assert (ok); |
+ |
+ if (parts.base) |
+ { |
+ if (REGNO (parts.base) == SP_REG || REGNO (parts.base) == BP_REG) |
+ return "lea{l}\t{%Z1, %k0|%k0, %Z1}"; |
+ } |
+ } |
+ return "lea{q}\t{%Z1, %0|%0, %Z1}"; |
+} |
[(set_attr "type" "lea") |
(set_attr "mode" "DI")]) |