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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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164 | 164 |
165 | 165 |
166 // Double word VFP register. | 166 // Double word VFP register. |
167 struct DwVfpRegister { | 167 struct DwVfpRegister { |
168 // d0 has been excluded from allocation. This is following ia32 | 168 // d0 has been excluded from allocation. This is following ia32 |
169 // where xmm0 is excluded. This should be revisited. | 169 // where xmm0 is excluded. This should be revisited. |
170 // Currently d0 is used as a scratch register. | 170 // Currently d0 is used as a scratch register. |
171 // d1 has also been excluded from allocation to be used as a scratch | 171 // d1 has also been excluded from allocation to be used as a scratch |
172 // register as well. | 172 // register as well. |
173 static const int kNumRegisters = 16; | 173 static const int kNumRegisters = 16; |
174 static const int kNumAllocatableRegisters = 14; | 174 static const int kNumAllocatableRegisters = 15; |
175 | 175 |
176 static int ToAllocationIndex(DwVfpRegister reg) { | 176 static int ToAllocationIndex(DwVfpRegister reg) { |
177 ASSERT(reg.code() != 0); | 177 ASSERT(reg.code() != 0); |
178 return reg.code() - 1; | 178 return reg.code() - 1; |
179 } | 179 } |
180 | 180 |
181 static DwVfpRegister FromAllocationIndex(int index) { | 181 static DwVfpRegister FromAllocationIndex(int index) { |
182 ASSERT(index >= 0 && index < kNumAllocatableRegisters); | 182 ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
183 return from_code(index + 2); | 183 return from_code(index + 1); |
184 } | 184 } |
185 | 185 |
186 static const char* AllocationIndexToString(int index) { | 186 static const char* AllocationIndexToString(int index) { |
187 ASSERT(index >= 0 && index < kNumAllocatableRegisters); | 187 ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
188 const char* const names[] = { | 188 const char* const names[] = { |
| 189 "d1", |
189 "d2", | 190 "d2", |
190 "d3", | 191 "d3", |
191 "d4", | 192 "d4", |
192 "d5", | 193 "d5", |
193 "d6", | 194 "d6", |
194 "d7", | 195 "d7", |
195 "d8", | 196 "d8", |
196 "d9", | 197 "d9", |
197 "d10", | 198 "d10", |
198 "d11", | 199 "d11", |
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1419 public: | 1420 public: |
1420 explicit EnsureSpace(Assembler* assembler) { | 1421 explicit EnsureSpace(Assembler* assembler) { |
1421 assembler->CheckBuffer(); | 1422 assembler->CheckBuffer(); |
1422 } | 1423 } |
1423 }; | 1424 }; |
1424 | 1425 |
1425 | 1426 |
1426 } } // namespace v8::internal | 1427 } } // namespace v8::internal |
1427 | 1428 |
1428 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1429 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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