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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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160 } | 160 } |
161 | 161 |
162 int code_; | 162 int code_; |
163 }; | 163 }; |
164 | 164 |
165 | 165 |
166 // Double word VFP register. | 166 // Double word VFP register. |
167 struct DwVfpRegister { | 167 struct DwVfpRegister { |
168 // d0 has been excluded from allocation. This is following ia32 | 168 // d0 has been excluded from allocation. This is following ia32 |
169 // where xmm0 is excluded. This should be revisited. | 169 // where xmm0 is excluded. This should be revisited. |
170 // Currently d0 is used as a scratch register. | |
171 // d1 has also been excluded from allocation to be used as a scratch | |
Mads Ager (chromium)
2011/01/13 12:25:54
I already landed this, but why is this in this pat
| |
172 // register as well. | |
170 static const int kNumRegisters = 16; | 173 static const int kNumRegisters = 16; |
171 static const int kNumAllocatableRegisters = 15; | 174 static const int kNumAllocatableRegisters = 14; |
172 | 175 |
173 static int ToAllocationIndex(DwVfpRegister reg) { | 176 static int ToAllocationIndex(DwVfpRegister reg) { |
174 ASSERT(reg.code() != 0); | 177 ASSERT(reg.code() != 0); |
175 return reg.code() - 1; | 178 return reg.code() - 1; |
176 } | 179 } |
177 | 180 |
178 static DwVfpRegister FromAllocationIndex(int index) { | 181 static DwVfpRegister FromAllocationIndex(int index) { |
179 ASSERT(index >= 0 && index < kNumAllocatableRegisters); | 182 ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
180 return from_code(index + 1); | 183 return from_code(index + 2); |
181 } | 184 } |
182 | 185 |
183 static const char* AllocationIndexToString(int index) { | 186 static const char* AllocationIndexToString(int index) { |
184 ASSERT(index >= 0 && index < kNumAllocatableRegisters); | 187 ASSERT(index >= 0 && index < kNumAllocatableRegisters); |
185 const char* const names[] = { | 188 const char* const names[] = { |
186 "d1", | |
187 "d2", | 189 "d2", |
188 "d3", | 190 "d3", |
189 "d4", | 191 "d4", |
190 "d5", | 192 "d5", |
191 "d6", | 193 "d6", |
192 "d7", | 194 "d7", |
193 "d8", | 195 "d8", |
194 "d9", | 196 "d9", |
195 "d10", | 197 "d10", |
196 "d11", | 198 "d11", |
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1417 public: | 1419 public: |
1418 explicit EnsureSpace(Assembler* assembler) { | 1420 explicit EnsureSpace(Assembler* assembler) { |
1419 assembler->CheckBuffer(); | 1421 assembler->CheckBuffer(); |
1420 } | 1422 } |
1421 }; | 1423 }; |
1422 | 1424 |
1423 | 1425 |
1424 } } // namespace v8::internal | 1426 } } // namespace v8::internal |
1425 | 1427 |
1426 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1428 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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