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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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887 } | 887 } |
888 | 888 |
889 void orl(Register dst, Register src) { | 889 void orl(Register dst, Register src) { |
890 arithmetic_op_32(0x0B, dst, src); | 890 arithmetic_op_32(0x0B, dst, src); |
891 } | 891 } |
892 | 892 |
893 void or_(Register dst, const Operand& src) { | 893 void or_(Register dst, const Operand& src) { |
894 arithmetic_op(0x0B, dst, src); | 894 arithmetic_op(0x0B, dst, src); |
895 } | 895 } |
896 | 896 |
| 897 void orl(Register dst, const Operand& src) { |
| 898 arithmetic_op_32(0x0B, dst, src); |
| 899 } |
| 900 |
897 void or_(const Operand& dst, Register src) { | 901 void or_(const Operand& dst, Register src) { |
898 arithmetic_op(0x09, src, dst); | 902 arithmetic_op(0x09, src, dst); |
899 } | 903 } |
900 | 904 |
901 void or_(Register dst, Immediate src) { | 905 void or_(Register dst, Immediate src) { |
902 immediate_arithmetic_op(0x1, dst, src); | 906 immediate_arithmetic_op(0x1, dst, src); |
903 } | 907 } |
904 | 908 |
905 void orl(Register dst, Immediate src) { | 909 void orl(Register dst, Immediate src) { |
906 immediate_arithmetic_op_32(0x1, dst, src); | 910 immediate_arithmetic_op_32(0x1, dst, src); |
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1050 arithmetic_op_32(0x33, dst, src); | 1054 arithmetic_op_32(0x33, dst, src); |
1051 } else { | 1055 } else { |
1052 arithmetic_op(0x33, dst, src); | 1056 arithmetic_op(0x33, dst, src); |
1053 } | 1057 } |
1054 } | 1058 } |
1055 | 1059 |
1056 void xorl(Register dst, Register src) { | 1060 void xorl(Register dst, Register src) { |
1057 arithmetic_op_32(0x33, dst, src); | 1061 arithmetic_op_32(0x33, dst, src); |
1058 } | 1062 } |
1059 | 1063 |
| 1064 void xorl(Register dst, const Operand& src) { |
| 1065 arithmetic_op_32(0x33, dst, src); |
| 1066 } |
| 1067 |
| 1068 void xorl(Register dst, Immediate src) { |
| 1069 immediate_arithmetic_op_32(0x6, dst, src); |
| 1070 } |
| 1071 |
| 1072 void xorl(const Operand& dst, Immediate src) { |
| 1073 immediate_arithmetic_op_32(0x6, dst, src); |
| 1074 } |
| 1075 |
1060 void xor_(Register dst, const Operand& src) { | 1076 void xor_(Register dst, const Operand& src) { |
1061 arithmetic_op(0x33, dst, src); | 1077 arithmetic_op(0x33, dst, src); |
1062 } | 1078 } |
1063 | 1079 |
1064 void xor_(const Operand& dst, Register src) { | 1080 void xor_(const Operand& dst, Register src) { |
1065 arithmetic_op(0x31, src, dst); | 1081 arithmetic_op(0x31, src, dst); |
1066 } | 1082 } |
1067 | 1083 |
1068 void xor_(Register dst, Immediate src) { | 1084 void xor_(Register dst, Immediate src) { |
1069 immediate_arithmetic_op(0x6, dst, src); | 1085 immediate_arithmetic_op(0x6, dst, src); |
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1535 private: | 1551 private: |
1536 Assembler* assembler_; | 1552 Assembler* assembler_; |
1537 #ifdef DEBUG | 1553 #ifdef DEBUG |
1538 int space_before_; | 1554 int space_before_; |
1539 #endif | 1555 #endif |
1540 }; | 1556 }; |
1541 | 1557 |
1542 } } // namespace v8::internal | 1558 } } // namespace v8::internal |
1543 | 1559 |
1544 #endif // V8_X64_ASSEMBLER_X64_H_ | 1560 #endif // V8_X64_ASSEMBLER_X64_H_ |
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