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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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291 const DwVfpRegister d8 = { 8 }; | 291 const DwVfpRegister d8 = { 8 }; |
292 const DwVfpRegister d9 = { 9 }; | 292 const DwVfpRegister d9 = { 9 }; |
293 const DwVfpRegister d10 = { 10 }; | 293 const DwVfpRegister d10 = { 10 }; |
294 const DwVfpRegister d11 = { 11 }; | 294 const DwVfpRegister d11 = { 11 }; |
295 const DwVfpRegister d12 = { 12 }; | 295 const DwVfpRegister d12 = { 12 }; |
296 const DwVfpRegister d13 = { 13 }; | 296 const DwVfpRegister d13 = { 13 }; |
297 const DwVfpRegister d14 = { 14 }; | 297 const DwVfpRegister d14 = { 14 }; |
298 const DwVfpRegister d15 = { 15 }; | 298 const DwVfpRegister d15 = { 15 }; |
299 | 299 |
300 // VFP FPSCR constants. | 300 // VFP FPSCR constants. |
| 301 static const uint32_t kVFPNConditionFlagBit = 1 << 31; |
| 302 static const uint32_t kVFPZConditionFlagBit = 1 << 30; |
| 303 static const uint32_t kVFPCConditionFlagBit = 1 << 29; |
| 304 static const uint32_t kVFPVConditionFlagBit = 1 << 28; |
| 305 |
| 306 static const uint32_t kVFPFlushToZeroMask = 1 << 24; |
| 307 |
| 308 static const uint32_t kVFPRoundingModeMask = 3 << 22; |
| 309 static const uint32_t kVFPRoundToMinusInfinityBits = 2 << 22; |
| 310 |
301 static const uint32_t kVFPExceptionMask = 0xf; | 311 static const uint32_t kVFPExceptionMask = 0xf; |
302 static const uint32_t kVFPRoundingModeMask = 3 << 22; | |
303 static const uint32_t kVFPFlushToZeroMask = 1 << 24; | |
304 static const uint32_t kVFPRoundToMinusInfinityBits = 2 << 22; | |
305 static const uint32_t kVFPZConditionFlagBit = 1 << 30; | |
306 static const uint32_t kVFPInvalidExceptionBit = 1; | |
307 | 312 |
308 // Coprocessor register | 313 // Coprocessor register |
309 struct CRegister { | 314 struct CRegister { |
310 bool is_valid() const { return 0 <= code_ && code_ < 16; } | 315 bool is_valid() const { return 0 <= code_ && code_ < 16; } |
311 bool is(CRegister creg) const { return code_ == creg.code_; } | 316 bool is(CRegister creg) const { return code_ == creg.code_; } |
312 int code() const { | 317 int code() const { |
313 ASSERT(is_valid()); | 318 ASSERT(is_valid()); |
314 return code_; | 319 return code_; |
315 } | 320 } |
316 int bit() const { | 321 int bit() const { |
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1412 public: | 1417 public: |
1413 explicit EnsureSpace(Assembler* assembler) { | 1418 explicit EnsureSpace(Assembler* assembler) { |
1414 assembler->CheckBuffer(); | 1419 assembler->CheckBuffer(); |
1415 } | 1420 } |
1416 }; | 1421 }; |
1417 | 1422 |
1418 | 1423 |
1419 } } // namespace v8::internal | 1424 } } // namespace v8::internal |
1420 | 1425 |
1421 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1426 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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