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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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1140 void vmul(const DwVfpRegister dst, | 1140 void vmul(const DwVfpRegister dst, |
1141 const DwVfpRegister src1, | 1141 const DwVfpRegister src1, |
1142 const DwVfpRegister src2, | 1142 const DwVfpRegister src2, |
1143 const Condition cond = al); | 1143 const Condition cond = al); |
1144 void vdiv(const DwVfpRegister dst, | 1144 void vdiv(const DwVfpRegister dst, |
1145 const DwVfpRegister src1, | 1145 const DwVfpRegister src1, |
1146 const DwVfpRegister src2, | 1146 const DwVfpRegister src2, |
1147 const Condition cond = al); | 1147 const Condition cond = al); |
1148 void vcmp(const DwVfpRegister src1, | 1148 void vcmp(const DwVfpRegister src1, |
1149 const DwVfpRegister src2, | 1149 const DwVfpRegister src2, |
1150 const SBit s = LeaveCC, | |
1151 const Condition cond = al); | 1150 const Condition cond = al); |
1152 void vcmp(const DwVfpRegister src1, | 1151 void vcmp(const DwVfpRegister src1, |
1153 const double src2, | 1152 const double src2, |
1154 const SBit s = LeaveCC, | |
1155 const Condition cond = al); | 1153 const Condition cond = al); |
1156 void vmrs(const Register dst, | 1154 void vmrs(const Register dst, |
1157 const Condition cond = al); | 1155 const Condition cond = al); |
1158 void vmsr(const Register dst, | 1156 void vmsr(const Register dst, |
1159 const Condition cond = al); | 1157 const Condition cond = al); |
1160 void vsqrt(const DwVfpRegister dst, | 1158 void vsqrt(const DwVfpRegister dst, |
1161 const DwVfpRegister src, | 1159 const DwVfpRegister src, |
1162 const Condition cond = al); | 1160 const Condition cond = al); |
1163 | 1161 |
1164 // Pseudo instructions | 1162 // Pseudo instructions |
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1414 public: | 1412 public: |
1415 explicit EnsureSpace(Assembler* assembler) { | 1413 explicit EnsureSpace(Assembler* assembler) { |
1416 assembler->CheckBuffer(); | 1414 assembler->CheckBuffer(); |
1417 } | 1415 } |
1418 }; | 1416 }; |
1419 | 1417 |
1420 | 1418 |
1421 } } // namespace v8::internal | 1419 } } // namespace v8::internal |
1422 | 1420 |
1423 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1421 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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