Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(386)

Side by Side Diff: src/x64/assembler-x64.cc

Issue 605024: Port arguments object allocation in generated code to ARM and x64.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « src/ia32/codegen-ia32.cc ('k') | src/x64/codegen-x64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 206 matching lines...) Expand 10 before | Expand all | Expand 10 after
217 *(pc_ + i) = *(instructions + i); 217 *(pc_ + i) = *(instructions + i);
218 } 218 }
219 219
220 // Indicate that code has changed. 220 // Indicate that code has changed.
221 CPU::FlushICache(pc_, instruction_count); 221 CPU::FlushICache(pc_, instruction_count);
222 } 222 }
223 223
224 // ----------------------------------------------------------------------------- 224 // -----------------------------------------------------------------------------
225 // Implementation of Operand 225 // Implementation of Operand
226 226
227 Operand::Operand(Register base, int32_t disp): rex_(0) { 227 Operand::Operand(Register base, int32_t disp) : rex_(0) {
228 len_ = 1; 228 len_ = 1;
229 if (base.is(rsp) || base.is(r12)) { 229 if (base.is(rsp) || base.is(r12)) {
230 // SIB byte is needed to encode (rsp + offset) or (r12 + offset). 230 // SIB byte is needed to encode (rsp + offset) or (r12 + offset).
231 set_sib(times_1, rsp, base); 231 set_sib(times_1, rsp, base);
232 } 232 }
233 233
234 if (disp == 0 && !base.is(rbp) && !base.is(r13)) { 234 if (disp == 0 && !base.is(rbp) && !base.is(r13)) {
235 set_modrm(0, base); 235 set_modrm(0, base);
236 } else if (is_int8(disp)) { 236 } else if (is_int8(disp)) {
237 set_modrm(1, base); 237 set_modrm(1, base);
238 set_disp8(disp); 238 set_disp8(disp);
239 } else { 239 } else {
240 set_modrm(2, base); 240 set_modrm(2, base);
241 set_disp32(disp); 241 set_disp32(disp);
242 } 242 }
243 } 243 }
244 244
245 245
246 Operand::Operand(Register base, 246 Operand::Operand(Register base,
247 Register index, 247 Register index,
248 ScaleFactor scale, 248 ScaleFactor scale,
249 int32_t disp): rex_(0) { 249 int32_t disp) : rex_(0) {
250 ASSERT(!index.is(rsp)); 250 ASSERT(!index.is(rsp));
251 len_ = 1; 251 len_ = 1;
252 set_sib(scale, index, base); 252 set_sib(scale, index, base);
253 if (disp == 0 && !base.is(rbp) && !base.is(r13)) { 253 if (disp == 0 && !base.is(rbp) && !base.is(r13)) {
254 // This call to set_modrm doesn't overwrite the REX.B (or REX.X) bits 254 // This call to set_modrm doesn't overwrite the REX.B (or REX.X) bits
255 // possibly set by set_sib. 255 // possibly set by set_sib.
256 set_modrm(0, rsp); 256 set_modrm(0, rsp);
257 } else if (is_int8(disp)) { 257 } else if (is_int8(disp)) {
258 set_modrm(1, rsp); 258 set_modrm(1, rsp);
259 set_disp8(disp); 259 set_disp8(disp);
260 } else { 260 } else {
261 set_modrm(2, rsp); 261 set_modrm(2, rsp);
262 set_disp32(disp); 262 set_disp32(disp);
263 } 263 }
264 } 264 }
265 265
266 266
267 Operand::Operand(Register index,
268 ScaleFactor scale,
269 int32_t disp) : rex_(0) {
270 ASSERT(!index.is(rsp));
271 len_ = 1;
272 set_modrm(0, rsp);
273 set_sib(scale, index, rbp);
274 set_disp32(disp);
275 }
276
277
267 // ----------------------------------------------------------------------------- 278 // -----------------------------------------------------------------------------
268 // Implementation of Assembler. 279 // Implementation of Assembler.
269 280
270 #ifdef GENERATED_CODE_COVERAGE 281 #ifdef GENERATED_CODE_COVERAGE
271 static void InitCoverageLog(); 282 static void InitCoverageLog();
272 #endif 283 #endif
273 284
274 byte* Assembler::spare_buffer_ = NULL; 285 byte* Assembler::spare_buffer_ = NULL;
275 286
276 Assembler::Assembler(void* buffer, int buffer_size) 287 Assembler::Assembler(void* buffer, int buffer_size)
(...skipping 2340 matching lines...) Expand 10 before | Expand all | Expand 10 after
2617 written_position_ = current_position_; 2628 written_position_ = current_position_;
2618 } 2629 }
2619 } 2630 }
2620 2631
2621 2632
2622 const int RelocInfo::kApplyMask = RelocInfo::kCodeTargetMask | 2633 const int RelocInfo::kApplyMask = RelocInfo::kCodeTargetMask |
2623 1 << RelocInfo::INTERNAL_REFERENCE | 2634 1 << RelocInfo::INTERNAL_REFERENCE |
2624 1 << RelocInfo::JS_RETURN; 2635 1 << RelocInfo::JS_RETURN;
2625 2636
2626 } } // namespace v8::internal 2637 } } // namespace v8::internal
OLDNEW
« no previous file with comments | « src/ia32/codegen-ia32.cc ('k') | src/x64/codegen-x64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698