Forking disassembler and simulator for Thumb2 support;...

src/arm/instr-thumb2.cc

Index: src/arm/instr-thumb2.cc
===================================================================
--- src/arm/instr-thumb2.cc	(revision 0)
+++ src/arm/instr-thumb2.cc	(revision 0)
@@ -0,0 +1,171 @@
+// Copyright 2010 the V8 project authors. All rights reserved.
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+//
+//     * Redistributions of source code must retain the above copyright
+//       notice, this list of conditions and the following disclaimer.
+//     * Redistributions in binary form must reproduce the above
+//       copyright notice, this list of conditions and the following
+//       disclaimer in the documentation and/or other materials provided
+//       with the distribution.
+//     * Neither the name of Google Inc. nor the names of its
+//       contributors may be used to endorse or promote products derived
+//       from this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+#include "v8.h"
+
+#include "instr-thumb2.h"
+
+namespace assembler {
+namespace arm {
+
+using ::v8::internal::PrintF;
+
+InstrThumb2::InstrThumb2(byte* pc)
+  : pc_(pc) {
+  instr0_ = *reinterpret_cast<int16_t*>(Address());
+  if (Bits0(15, 13) == b111 && Bits0(12, 11) != b00) {
+    instr1_ = *reinterpret_cast<int16_t*>(
+        reinterpret_cast<int32_t>(Address() + 2));
+    size_ = 4;
+    Decode32();
+  } else {
+    size_ = 2;
+    Decode16();
+  }
+}
+
+void InstrThumb2::Decode16() {
+  switch (Bits0(15, 11)) {
+    case b00110:
+      Decode16_Rdn3Imm8(OP_ADD, VARIANT_IMMEDIATE);
+      break;
+    case b10101:
+      Decode16_Rdn3Imm8(OP_ADD, VARIANT_SP_PLUS_IMMEDIATE);
+      break;
+    case b11100:
+      Decode16_Imm11(OP_B, VARIANT_REGISTER);
+      break;
+    case b11111:
+      Decode16_Imm11(OP_BL, VARIANT_IMMEDIATE);
+      break;
+    case b00100:
+      Decode16_Rdn3Imm8(OP_CMP, VARIANT_IMMEDIATE);
+      break;
+    default:
+      UnsupportedInstruction();
+  }
+}
+
+void InstrThumb2::Decode32() {
+  switch (instr0_ & (0xff * B5)) {
+    case b0101 * B9 | b0000 * B5:
+      Decode32_SRn4XImm3Rd4Imm2Type2Rm4(OP_AND, VARIANT_REGISTER);
+      DecodeImmShift();
+      break;
+    case b0101 * B9 | b1000 * B5:
+      Decode32_SRn4XImm3Rd4Imm2Type2Rm4(OP_ADD, VARIANT_REGISTER);
+      DecodeImmShift();
+      break;
+    case b1000 * B9 | b1101 * B5:
+    case b1010 * B9 | b1101 * B5:  // B10 is part of Imm
+      Decode32_ImmX5SRn4XImm3Rd4Imm8(OP_SUB, VARIANT_IMMEDIATE);
+      ThumbExpandImm();
+      break;
+
+    default:
+      UnsupportedInstruction();
+  }
+}
+
+void InstrThumb2::UnsupportedInstruction() {
+  if (size_ == 2) {
+    PrintF("Unsupported 16bit instruction %x\n", instr0_);
+  } else {
+    PrintF("Unsupported 32bit instruction %x:%x\n", instr0_, instr1_);
+  }
+  op_ = OP_UNSUPPORTED;
+}
+
+void InstrThumb2::Decode16_Rdn3Imm8(Operation op, OpVariant variant) {
+  op_ = op;
+  variant_ = variant;
+  s_ = AUTO;
+
+  imm_ = Bits0(7, 0);
+  rd_ = rn_ = Bits0(10, 8);
+}
+
+void InstrThumb2::Decode16_Imm11(Operation op, OpVariant variant) {
+  op_ = op;
+  variant_ = variant;
+  s_ = AUTO;
+
+  imm_ = Bits0(10, 0);
+}
+
+void InstrThumb2::Decode32_SRn4XImm3Rd4Imm2Type2Rm4(Operation op,
+                                                    OpVariant variant) {
+  op_ = op;
+  variant_ = variant;
+
+  s_ = Bit0(4);
+  rn_ = Bits0(3, 0);
+  imm_ = Bits1(14, 12) * B2 | Bits1(7, 6);
+  rd_ = Bits1(11, 8);
+  type_ = Bits1(5, 4);
+  rm_ = Bits1(3, 0);
+}
+
+void InstrThumb2::Decode32_ImmX5SRn4XImm3Rd4Imm8(Operation op,
+                                                 OpVariant variant) {
+  op_ = op;
+  variant_ = variant;
+
+  s_ = Bit0(4);
+  imm_ = Bit0(10) * B11 | Bits1(14, 12) * B8 | Bits1(7, 0);
+  rn_ = Bits0(3, 0);
+  rd_ = Bits1(11, 8);
+}
+
+void InstrThumb2::DecodeImmShift() {
+  if (imm_ == 0) {
+    switch (type_) {
+      case LSL:
+        type_ = no_shift;
+        break;
+      case ASR:
+      case LSR:
+        imm_ = 32;
+        break;
+      case ROR:
+        type_ = RRX;
+        imm_ = 1;
+        break;
+      default:
+        UnsupportedInstruction();
+    }
+  }
+}
+
+void InstrThumb2::ThumbExpandImm() {
+  if (imm_ > 255) {
+    // TODO(haustein) Support thumb2 immediate shift here..
+    UnsupportedInstruction();
+  }
+}
+
+} }  // namespace