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Issue 601028: Forking disassembler and simulator for Thumb2 support;... Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 10 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are
4 // met:
5 //
6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided
11 // with the distribution.
12 // * Neither the name of Google Inc. nor the names of its
13 // contributors may be used to endorse or promote products derived
14 // from this software without specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
28 #include "v8.h"
29
30 #include "instr-thumb2.h"
31
32 namespace assembler {
33 namespace arm {
34
35 using ::v8::internal::PrintF;
36
37 InstrThumb2::InstrThumb2(byte* pc)
38 : pc_(pc) {
39 instr0_ = *reinterpret_cast<int16_t*>(Address());
40 if (Bits0(15, 13) == b111 && Bits0(12, 11) != b00) {
41 instr1_ = *reinterpret_cast<int16_t*>(
42 reinterpret_cast<int32_t>(Address() + 2));
43 size_ = 4;
44 Decode32();
45 } else {
46 size_ = 2;
47 Decode16();
48 }
49 }
50
51 void InstrThumb2::Decode16() {
52 switch (Bits0(15, 11)) {
53 case b00110:
54 Decode16_Rdn3Imm8(OP_ADD, VARIANT_IMMEDIATE);
55 break;
56 case b10101:
57 Decode16_Rdn3Imm8(OP_ADD, VARIANT_SP_PLUS_IMMEDIATE);
58 break;
59 case b11100:
60 Decode16_Imm11(OP_B, VARIANT_REGISTER);
61 break;
62 case b11111:
63 Decode16_Imm11(OP_BL, VARIANT_IMMEDIATE);
64 break;
65 case b00100:
66 Decode16_Rdn3Imm8(OP_CMP, VARIANT_IMMEDIATE);
67 break;
68 default:
69 UnsupportedInstruction();
70 }
71 }
72
73 void InstrThumb2::Decode32() {
74 switch (instr0_ & (0xff * B5)) {
75 case b0101 * B9 | b0000 * B5:
76 Decode32_SRn4XImm3Rd4Imm2Type2Rm4(OP_AND, VARIANT_REGISTER);
77 DecodeImmShift();
78 break;
79 case b0101 * B9 | b1000 * B5:
80 Decode32_SRn4XImm3Rd4Imm2Type2Rm4(OP_ADD, VARIANT_REGISTER);
81 DecodeImmShift();
82 break;
83 case b1000 * B9 | b1101 * B5:
84 case b1010 * B9 | b1101 * B5: // B10 is part of Imm
85 Decode32_ImmX5SRn4XImm3Rd4Imm8(OP_SUB, VARIANT_IMMEDIATE);
86 ThumbExpandImm();
87 break;
88
89 default:
90 UnsupportedInstruction();
91 }
92 }
93
94 void InstrThumb2::UnsupportedInstruction() {
95 if (size_ == 2) {
96 PrintF("Unsupported 16bit instruction %x\n", instr0_);
97 } else {
98 PrintF("Unsupported 32bit instruction %x:%x\n", instr0_, instr1_);
99 }
100 op_ = OP_UNSUPPORTED;
101 }
102
103 void InstrThumb2::Decode16_Rdn3Imm8(Operation op, OpVariant variant) {
104 op_ = op;
105 variant_ = variant;
106 s_ = AUTO;
107
108 imm_ = Bits0(7, 0);
109 rd_ = rn_ = Bits0(10, 8);
110 }
111
112 void InstrThumb2::Decode16_Imm11(Operation op, OpVariant variant) {
113 op_ = op;
114 variant_ = variant;
115 s_ = AUTO;
116
117 imm_ = Bits0(10, 0);
118 }
119
120 void InstrThumb2::Decode32_SRn4XImm3Rd4Imm2Type2Rm4(Operation op,
121 OpVariant variant) {
122 op_ = op;
123 variant_ = variant;
124
125 s_ = Bit0(4);
126 rn_ = Bits0(3, 0);
127 imm_ = Bits1(14, 12) * B2 | Bits1(7, 6);
128 rd_ = Bits1(11, 8);
129 type_ = Bits1(5, 4);
130 rm_ = Bits1(3, 0);
131 }
132
133 void InstrThumb2::Decode32_ImmX5SRn4XImm3Rd4Imm8(Operation op,
134 OpVariant variant) {
135 op_ = op;
136 variant_ = variant;
137
138 s_ = Bit0(4);
139 imm_ = Bit0(10) * B11 | Bits1(14, 12) * B8 | Bits1(7, 0);
140 rn_ = Bits0(3, 0);
141 rd_ = Bits1(11, 8);
142 }
143
144 void InstrThumb2::DecodeImmShift() {
145 if (imm_ == 0) {
146 switch (type_) {
147 case LSL:
148 type_ = no_shift;
149 break;
150 case ASR:
151 case LSR:
152 imm_ = 32;
153 break;
154 case ROR:
155 type_ = RRX;
156 imm_ = 1;
157 break;
158 default:
159 UnsupportedInstruction();
160 }
161 }
162 }
163
164 void InstrThumb2::ThumbExpandImm() {
165 if (imm_ > 255) {
166 // TODO(haustein) Support thumb2 immediate shift here..
167 UnsupportedInstruction();
168 }
169 }
170
171 } } // namespace
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