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Unified Diff: src/ia32/codegen-ia32.cc

Issue 598059: Fix problem with GenericBinaryOperationStub::GenerateCall for a Smi... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 10 months ago
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Index: src/ia32/codegen-ia32.cc
===================================================================
--- src/ia32/codegen-ia32.cc (revision 3833)
+++ src/ia32/codegen-ia32.cc (working copy)
@@ -7036,6 +7036,8 @@
}
} else if (left.is(left_arg)) {
__ mov(right_arg, right);
+ } else if (right.is(right_arg)) {
+ __ mov(left_arg, left);
} else if (left.is(right_arg)) {
if (IsOperationCommutative()) {
__ mov(left_arg, right);
@@ -7054,8 +7056,6 @@
__ mov(right_arg, right);
__ mov(left_arg, left);
}
- } else if (right.is(right_arg)) {
- __ mov(left_arg, left);
} else {
// Order of moves is not important.
__ mov(left_arg, left);
@@ -7091,6 +7091,10 @@
__ mov(left_arg, Immediate(right));
SetArgsReversed();
} else {
+ // For non-commutative operations, left and right_arg might be
+ // the same register. Therefore, the order of the moves is
+ // important here in order to not overwrite left before moving
+ // it to left_arg.
__ mov(left_arg, left);
__ mov(right_arg, Immediate(right));
}
@@ -7123,8 +7127,12 @@
__ mov(right_arg, Immediate(left));
SetArgsReversed();
} else {
+ // For non-commutative operations, right and left_arg might be
+ // the same register. Therefore, the order of the moves is
+ // important here in order to not overwrite right before moving
+ // it to right_arg.
+ __ mov(right_arg, right);
__ mov(left_arg, Immediate(left));
- __ mov(right_arg, right);
}
// Update flags to indicate that arguments are in registers.
SetArgsInRegisters();
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