| Index: src/x64/disasm-x64.cc
|
| diff --git a/src/x64/disasm-x64.cc b/src/x64/disasm-x64.cc
|
| index ce3aae8a2c69a888072801f3e890217fd7be9f71..547daeeb177c18a5179a18b0911a522b1371a9fc 100644
|
| --- a/src/x64/disasm-x64.cc
|
| +++ b/src/x64/disasm-x64.cc
|
| @@ -993,7 +993,60 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
|
| byte* current = data + 2;
|
| // At return, "current" points to the start of the next instruction.
|
| const char* mnemonic = TwoByteMnemonic(opcode);
|
| - if (opcode == 0x1F) {
|
| + if (operand_size_ == 0x66) {
|
| + // 0x66 0x0F prefix.
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + const char* mnemonic = "?";
|
| + if (opcode == 0x57) {
|
| + mnemonic = "xorpd";
|
| + } else if (opcode == 0x2E) {
|
| + mnemonic = "comisd";
|
| + } else if (opcode == 0x2F) {
|
| + mnemonic = "ucomisd";
|
| + } else {
|
| + UnimplementedInstruction();
|
| + }
|
| + AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
|
| + current += PrintRightXMMOperand(current);
|
| + } else if (group_1_prefix_ == 0xF2) {
|
| + // Beginning of instructions with prefix 0xF2.
|
| +
|
| + if (opcode == 0x11 || opcode == 0x10) {
|
| + // MOVSD: Move scalar double-precision fp to/from/between XMM registers.
|
| + AppendToBuffer("movsd ");
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + if (opcode == 0x11) {
|
| + current += PrintRightOperand(current);
|
| + AppendToBuffer(",%s", NameOfXMMRegister(regop));
|
| + } else {
|
| + AppendToBuffer("%s,", NameOfXMMRegister(regop));
|
| + current += PrintRightOperand(current);
|
| + }
|
| + } else if (opcode == 0x2A) {
|
| + // CVTSI2SD: integer to XMM double conversion.
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
|
| + current += PrintRightOperand(current);
|
| + } else if ((opcode & 0xF8) == 0x58) {
|
| + // XMM arithmetic. Mnemonic was retrieved at the start of this function.
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
|
| + current += PrintRightXMMOperand(current);
|
| + } else {
|
| + UnimplementedInstruction();
|
| + }
|
| + } else if (opcode == 0x2C && group_1_prefix_ == 0xF3) {
|
| + // Instruction with prefix 0xF3.
|
| +
|
| + // CVTTSS2SI: Convert scalar single-precision FP to dword integer.
|
| + // Assert that mod is not 3, so source is memory, not an XMM register.
|
| + ASSERT_NE(0xC0, *current & 0xC0);
|
| + current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current);
|
| + } else if (opcode == 0x1F) {
|
| // NOP
|
| int mod, regop, rm;
|
| get_modrm(*current, &mod, ®op, &rm);
|
| @@ -1007,8 +1060,7 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
|
| current += 4;
|
| } // else no immediate displacement.
|
| AppendToBuffer("nop");
|
| -
|
| - } else if (opcode == 0xA2 || opcode == 0x31) {
|
| + } else if (opcode == 0xA2 || opcode == 0x31) {
|
| // RDTSC or CPUID
|
| AppendToBuffer("%s", mnemonic);
|
|
|
| @@ -1043,43 +1095,6 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
|
| } else {
|
| AppendToBuffer(",%s,cl", NameOfCPURegister(regop));
|
| }
|
| - } else if (group_1_prefix_ == 0xF2) {
|
| - // Beginning of instructions with prefix 0xF2.
|
| -
|
| - if (opcode == 0x11 || opcode == 0x10) {
|
| - // MOVSD: Move scalar double-precision fp to/from/between XMM registers.
|
| - AppendToBuffer("movsd ");
|
| - int mod, regop, rm;
|
| - get_modrm(*current, &mod, ®op, &rm);
|
| - if (opcode == 0x11) {
|
| - current += PrintRightOperand(current);
|
| - AppendToBuffer(",%s", NameOfXMMRegister(regop));
|
| - } else {
|
| - AppendToBuffer("%s,", NameOfXMMRegister(regop));
|
| - current += PrintRightOperand(current);
|
| - }
|
| - } else if (opcode == 0x2A) {
|
| - // CVTSI2SD: integer to XMM double conversion.
|
| - int mod, regop, rm;
|
| - get_modrm(*current, &mod, ®op, &rm);
|
| - AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
|
| - current += PrintRightOperand(current);
|
| - } else if ((opcode & 0xF8) == 0x58) {
|
| - // XMM arithmetic. Mnemonic was retrieved at the start of this function.
|
| - int mod, regop, rm;
|
| - get_modrm(*current, &mod, ®op, &rm);
|
| - AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
|
| - current += PrintRightXMMOperand(current);
|
| - } else {
|
| - UnimplementedInstruction();
|
| - }
|
| - } else if (opcode == 0x2C && group_1_prefix_ == 0xF3) {
|
| - // Instruction with prefix 0xF3.
|
| -
|
| - // CVTTSS2SI: Convert scalar single-precision FP to dword integer.
|
| - // Assert that mod is not 3, so source is memory, not an XMM register.
|
| - ASSERT_NE(0xC0, *current & 0xC0);
|
| - current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current);
|
| } else {
|
| UnimplementedInstruction();
|
| }
|
|
|