Provide baseline GC version.

src/ia32/ic-ia32.cc

Index: src/ia32/ic-ia32.cc
diff --git a/src/ia32/ic-ia32.cc b/src/ia32/ic-ia32.cc
index d713601d167347e6f3090235017da8535703a2ac..8d47e29f788bcaa876fc6f458956dbac646d532d 100644
--- a/src/ia32/ic-ia32.cc
+++ b/src/ia32/ic-ia32.cc
@@ -1728,7 +1728,9 @@ bool StoreIC::PatchInlinedStore(Address address, Object* map, int offset) {
   Address encoded_offsets_address = test_instruction_address + 1;
   int encoded_offsets = *reinterpret_cast<int*>(encoded_offsets_address);
   int delta_to_map_check = -(encoded_offsets & 0xFFFF);
+#ifndef BASELINE_GC
   int delta_to_record_write = encoded_offsets >> 16;
+#endif
 
   // Patch the map to check. The map address is the last 4 bytes of
   // the 7-byte operand-immediate compare instruction.
@@ -1747,6 +1749,7 @@ bool StoreIC::PatchInlinedStore(Address address, Object* map, int offset) {
          (offset == 0 && map == Heap::null_value()));
   *reinterpret_cast<int*>(offset_address) = offset - kHeapObjectTag;
 
+#ifndef BASELINE_GC
   // Patch the offset in the write-barrier code. The offset is the
   // last 4 bytes of a six byte lea instruction.
   offset_address = map_check_address + delta_to_record_write + 2;
@@ -1756,6 +1759,7 @@ bool StoreIC::PatchInlinedStore(Address address, Object* map, int offset) {
          *reinterpret_cast<int*>(offset_address) == -1 ||
          (offset == 0 && map == Heap::null_value()));
   *reinterpret_cast<int*>(offset_address) = offset - kHeapObjectTag;
+#endif
 
   return true;
 }