| Index: src/arm/assembler-arm.cc
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| ===================================================================
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| --- src/arm/assembler-arm.cc	(revision 3799)
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| +++ src/arm/assembler-arm.cc	(working copy)
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| @@ -51,9 +51,14 @@
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|    // If the compiler is allowed to use vfp then we can use vfp too in our
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|    // code generation.
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|  #if !defined(__arm__)
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| -  // For the simulator=arm build, always use VFP since the arm simulator has
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| -  // VFP support.
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| -  supported_ |= 1u << VFP3;
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| +  // For the simulator=arm build, use VFP when FLAG_enable_vfp3 is enabled.
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| +  if (FLAG_enable_vfp3) {
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| +      supported_ |= 1u << VFP3;
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| +  }
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| +  // For the simulator=arm build, use ARMv7 when FLAG_enable_armv7 is enabled
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| +  if (FLAG_enable_armv7) {
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| +      supported_ |= 1u << ARMv7;
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| +  }
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|  #else
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|    if (Serializer::enabled()) {
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|      supported_ |= OS::CpuFeaturesImpliedByPlatform();
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| @@ -66,6 +71,11 @@
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|      supported_ |= 1u << VFP3;
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|      found_by_runtime_probing_ |= 1u << VFP3;
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|    }
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| +
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| +  if (OS::ArmCpuHasFeature(ARMv7)) {
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| +    supported_ |= 1u << ARMv7;
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| +    found_by_runtime_probing_ |= 1u << ARMv7;
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| +  }
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|  #endif
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|  }
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|  
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| @@ -850,6 +860,21 @@
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|  
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|  
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|  // Data-processing instructions
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| +
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| +// UBFX <Rd>,<Rn>,#<lsb>,#<width - 1>
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| +// Instruction details available in ARM DDI 0406A, A8-464.
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| +// cond(31-28) | 01111(27-23)| 1(22) | 1(21) | widthm1(20-16) |
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| +//  Rd(15-12) | lsb(11-7) | 101(6-4) | Rn(3-0)
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| +void Assembler::ubfx(Register dst, Register src1, const Operand& src2,
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| +                     const Operand& src3, Condition cond) {
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| +  ASSERT(!src2.rm_.is_valid() && !src3.rm_.is_valid());
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| +  ASSERT(static_cast<uint32_t>(src2.imm32_) <= 0x1f);
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| +  ASSERT(static_cast<uint32_t>(src3.imm32_) <= 0x1f);
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| +  emit(cond | 0x3F*B21 | src3.imm32_*B16 |
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| +       dst.code()*B12 | src2.imm32_*B7 | 0x5*B4 | src1.code());
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| +}
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| +
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| +
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|  void Assembler::and_(Register dst, Register src1, const Operand& src2,
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|                       SBit s, Condition cond) {
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|    addrmod1(cond | 0*B21 | s, src1, dst, src2);
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| 
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