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Issue 573027: ARMv7 ubfx support... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 10 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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422 } 422 }
423 // 'msg: for simulator break instructions 423 // 'msg: for simulator break instructions
424 ASSERT(STRING_STARTS_WITH(format, "msg")); 424 ASSERT(STRING_STARTS_WITH(format, "msg"));
425 byte* str = 425 byte* str =
426 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0fffffff); 426 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0fffffff);
427 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_, 427 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_,
428 "%s", converter_.NameInCode(str)); 428 "%s", converter_.NameInCode(str));
429 return 3; 429 return 3;
430 } 430 }
431 case 'o': { 431 case 'o': {
432 if (format[3] == '1') { 432 if ((format[3] == '1') && (format[4] == '2')) {
433 // 'off12: 12-bit offset for load and store instructions 433 // 'off12: 12-bit offset for load and store instructions
434 ASSERT(STRING_STARTS_WITH(format, "off12")); 434 ASSERT(STRING_STARTS_WITH(format, "off12"));
435 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_, 435 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_,
436 "%d", instr->Offset12Field()); 436 "%d", instr->Offset12Field());
437 return 5; 437 return 5;
438 } else if ((format[3] == '1') && (format[4] == '6')) {
439 ASSERT(STRING_STARTS_WITH(format, "off16to20"));
440 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_,
441 "%d", instr->Bits(20, 16) +1);
442 return 9;
443 } else if (format[3] == '7') {
444 ASSERT(STRING_STARTS_WITH(format, "off7to11"));
445 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_,
446 "%d", instr->ShiftAmountField());
447 return 8;
438 } 448 }
439 // 'off8: 8-bit offset for extra load and store instructions 449 // 'off8: 8-bit offset for extra load and store instructions
440 ASSERT(STRING_STARTS_WITH(format, "off8")); 450 ASSERT(STRING_STARTS_WITH(format, "off8"));
441 int offs8 = (instr->ImmedHField() << 4) | instr->ImmedLField(); 451 int offs8 = (instr->ImmedHField() << 4) | instr->ImmedLField();
442 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_, 452 out_buffer_pos_ += v8i::OS::SNPrintF(out_buffer_ + out_buffer_pos_,
443 "%d", offs8); 453 "%d", offs8);
444 return 4; 454 return 4;
445 } 455 }
446 case 'p': { // 'pu: P and U bits for load and store instructions 456 case 'p': { // 'pu: P and U bits for load and store instructions
447 ASSERT(STRING_STARTS_WITH(format, "pu")); 457 ASSERT(STRING_STARTS_WITH(format, "pu"));
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788 case 1: { 798 case 1: {
789 ASSERT(!instr->HasW()); 799 ASSERT(!instr->HasW());
790 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm"); 800 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm");
791 break; 801 break;
792 } 802 }
793 case 2: { 803 case 2: {
794 Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w"); 804 Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
795 break; 805 break;
796 } 806 }
797 case 3: { 807 case 3: {
798 Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w"); 808 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) {
809 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16));
810 uint32_t lsbit = static_cast<uint32_t>(instr->ShiftAmountField());
811 uint32_t msbit = widthminus1 + lsbit;
812 if (msbit <= 31) {
813 Format(instr, "ubfx'cond 'rd, 'rm, #'off7to11, #'off16to20");
814 } else {
815 UNREACHABLE();
816 }
817 } else {
818 Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w");
819 }
799 break; 820 break;
800 } 821 }
801 default: { 822 default: {
802 // The PU field is a 2-bit field. 823 // The PU field is a 2-bit field.
803 UNREACHABLE(); 824 UNREACHABLE();
804 break; 825 break;
805 } 826 }
806 } 827 }
807 } 828 }
808 829
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1171 buffer[0] = '\0'; 1192 buffer[0] = '\0';
1172 byte* prev_pc = pc; 1193 byte* prev_pc = pc;
1173 pc += d.InstructionDecode(buffer, pc); 1194 pc += d.InstructionDecode(buffer, pc);
1174 fprintf(f, "%p %08x %s\n", 1195 fprintf(f, "%p %08x %s\n",
1175 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1196 prev_pc, *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1176 } 1197 }
1177 } 1198 }
1178 1199
1179 1200
1180 } // namespace disasm 1201 } // namespace disasm
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