| Index: src/ia32/ic-ia32.cc
|
| ===================================================================
|
| --- src/ia32/ic-ia32.cc (revision 5952)
|
| +++ src/ia32/ic-ia32.cc (working copy)
|
| @@ -2076,6 +2076,34 @@
|
| }
|
|
|
|
|
| +void TRBinaryOpIC::PatchInlinedSmiCode(Address address) {
|
| + // The address of the instruction following the call.
|
| + Address test_instruction_address =
|
| + address + Assembler::kCallTargetAddressOffset;
|
| +
|
| + // If the instruction following the call is not a test eax, nothing
|
| + // was inlined.
|
| + if (*test_instruction_address != Assembler::kTestEaxByte) return;
|
| +
|
| + Address delta_address = test_instruction_address + 1;
|
| + // The delta to the start of the map check instruction and the
|
| + // condition code uses at the patched jump.
|
| + int delta_and_condition = *reinterpret_cast<int*>(delta_address);
|
| + int condition = delta_and_condition & 0xffff;
|
| + int delta = delta_and_condition >> 16;
|
| + if (FLAG_trace_ic) {
|
| + PrintF("[TRBinaryOpIC patching ic at %p, test=%p, delta=%d, cc=%d\n",
|
| + address, test_instruction_address, delta, condition);
|
| + }
|
| +
|
| + // Patch with a short conditional jump. There must be an unconditional
|
| + // short jump at this position.
|
| + Address jmp_address = test_instruction_address - delta;
|
| + ASSERT(*jmp_address == Assembler::kJmpShortOpcode);
|
| + *jmp_address = static_cast<byte>(Assembler::kJccShortPrefix | condition);
|
| +}
|
| +
|
| +
|
| } } // namespace v8::internal
|
|
|
| #endif // V8_TARGET_ARCH_IA32
|
|
|