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1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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120 | 120 |
121 // The currently executing Simulator instance. Potentially there can be one | 121 // The currently executing Simulator instance. Potentially there can be one |
122 // for each native thread. | 122 // for each native thread. |
123 static Simulator* current(); | 123 static Simulator* current(); |
124 | 124 |
125 // Accessors for register state. Reading the pc value adheres to the ARM | 125 // Accessors for register state. Reading the pc value adheres to the ARM |
126 // architecture specification and is off by a 8 from the currently executing | 126 // architecture specification and is off by a 8 from the currently executing |
127 // instruction. | 127 // instruction. |
128 void set_register(int reg, int32_t value); | 128 void set_register(int reg, int32_t value); |
129 int32_t get_register(int reg) const; | 129 int32_t get_register(int reg) const; |
| 130 void set_dw_register(int dreg, const int* dbl); |
130 | 131 |
131 // Support for VFP. | 132 // Support for VFP. |
132 void set_s_register(int reg, unsigned int value); | 133 void set_s_register(int reg, unsigned int value); |
133 unsigned int get_s_register(int reg) const; | 134 unsigned int get_s_register(int reg) const; |
134 void set_d_register_from_double(int dreg, const double& dbl); | 135 void set_d_register_from_double(int dreg, const double& dbl); |
135 double get_double_from_d_register(int dreg); | 136 double get_double_from_d_register(int dreg); |
136 void set_s_register_from_float(int sreg, const float dbl); | 137 void set_s_register_from_float(int sreg, const float dbl); |
137 float get_float_from_s_register(int sreg); | 138 float get_float_from_s_register(int sreg); |
138 void set_s_register_from_sinteger(int reg, const int value); | 139 void set_s_register_from_sinteger(int reg, const int value); |
139 int get_sinteger_from_s_register(int reg); | 140 int get_sinteger_from_s_register(int reg); |
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210 | 211 |
211 inline uint16_t ReadHU(int32_t addr, Instr* instr); | 212 inline uint16_t ReadHU(int32_t addr, Instr* instr); |
212 inline int16_t ReadH(int32_t addr, Instr* instr); | 213 inline int16_t ReadH(int32_t addr, Instr* instr); |
213 // Note: Overloaded on the sign of the value. | 214 // Note: Overloaded on the sign of the value. |
214 inline void WriteH(int32_t addr, uint16_t value, Instr* instr); | 215 inline void WriteH(int32_t addr, uint16_t value, Instr* instr); |
215 inline void WriteH(int32_t addr, int16_t value, Instr* instr); | 216 inline void WriteH(int32_t addr, int16_t value, Instr* instr); |
216 | 217 |
217 inline int ReadW(int32_t addr, Instr* instr); | 218 inline int ReadW(int32_t addr, Instr* instr); |
218 inline void WriteW(int32_t addr, int value, Instr* instr); | 219 inline void WriteW(int32_t addr, int value, Instr* instr); |
219 | 220 |
| 221 int* ReadDW(int32_t addr); |
| 222 void WriteDW(int32_t addr, int32_t value1, int32_t value2); |
| 223 |
220 // Executing is handled based on the instruction type. | 224 // Executing is handled based on the instruction type. |
221 void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one | 225 void DecodeType01(Instr* instr); // both type 0 and type 1 rolled into one |
222 void DecodeType2(Instr* instr); | 226 void DecodeType2(Instr* instr); |
223 void DecodeType3(Instr* instr); | 227 void DecodeType3(Instr* instr); |
224 void DecodeType4(Instr* instr); | 228 void DecodeType4(Instr* instr); |
225 void DecodeType5(Instr* instr); | 229 void DecodeType5(Instr* instr); |
226 void DecodeType6(Instr* instr); | 230 void DecodeType6(Instr* instr); |
227 void DecodeType7(Instr* instr); | 231 void DecodeType7(Instr* instr); |
228 void DecodeUnconditional(Instr* instr); | 232 void DecodeUnconditional(Instr* instr); |
229 | 233 |
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297 | 301 |
298 static inline void UnregisterCTryCatch() { | 302 static inline void UnregisterCTryCatch() { |
299 assembler::arm::Simulator::current()->PopAddress(); | 303 assembler::arm::Simulator::current()->PopAddress(); |
300 } | 304 } |
301 }; | 305 }; |
302 | 306 |
303 | 307 |
304 #endif // defined(__arm__) | 308 #endif // defined(__arm__) |
305 | 309 |
306 #endif // V8_ARM_SIMULATOR_ARM_H_ | 310 #endif // V8_ARM_SIMULATOR_ARM_H_ |
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