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Side by Side Diff: src/arm/assembler-arm-inl.h

Issue 563008: Remove some unused code on ARM (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 10 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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167 } 167 }
168 168
169 169
170 Operand::Operand(const ExternalReference& f) { 170 Operand::Operand(const ExternalReference& f) {
171 rm_ = no_reg; 171 rm_ = no_reg;
172 imm32_ = reinterpret_cast<int32_t>(f.address()); 172 imm32_ = reinterpret_cast<int32_t>(f.address());
173 rmode_ = RelocInfo::EXTERNAL_REFERENCE; 173 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
174 } 174 }
175 175
176 176
177 Operand::Operand(Object** opp) {
178 rm_ = no_reg;
179 imm32_ = reinterpret_cast<int32_t>(opp);
180 rmode_ = RelocInfo::NONE;
181 }
182
183
184 Operand::Operand(Context** cpp) {
185 rm_ = no_reg;
186 imm32_ = reinterpret_cast<int32_t>(cpp);
187 rmode_ = RelocInfo::NONE;
188 }
189
190
191 Operand::Operand(Smi* value) { 177 Operand::Operand(Smi* value) {
192 rm_ = no_reg; 178 rm_ = no_reg;
193 imm32_ = reinterpret_cast<intptr_t>(value); 179 imm32_ = reinterpret_cast<intptr_t>(value);
194 rmode_ = RelocInfo::NONE; 180 rmode_ = RelocInfo::NONE;
195 } 181 }
196 182
197 183
198 Operand::Operand(Register rm) { 184 Operand::Operand(Register rm) {
199 rm_ = rm; 185 rm_ = rm;
200 rs_ = no_reg; 186 rs_ = no_reg;
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268 // CPU::FlushICache(pc, sizeof(target)); 254 // CPU::FlushICache(pc, sizeof(target));
269 // However, on ARM, no instruction was actually patched by the assignment 255 // However, on ARM, no instruction was actually patched by the assignment
270 // above; the target address is not part of an instruction, it is patched in 256 // above; the target address is not part of an instruction, it is patched in
271 // the constant pool and is read via a data access; the instruction accessing 257 // the constant pool and is read via a data access; the instruction accessing
272 // this address in the constant pool remains unchanged. 258 // this address in the constant pool remains unchanged.
273 } 259 }
274 260
275 } } // namespace v8::internal 261 } } // namespace v8::internal
276 262
277 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ 263 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_
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