Support register arguments in more cases....

src/ia32/codegen-ia32.cc

Index: src/ia32/codegen-ia32.cc
===================================================================
--- src/ia32/codegen-ia32.cc	(revision 3695)
+++ src/ia32/codegen-ia32.cc	(working copy)
@@ -978,10 +978,8 @@
   Result answer;
   if (left_is_non_smi || right_is_non_smi) {
     // Go straight to the slow case, with no smi code.
-    frame_->Push(&left);
-    frame_->Push(&right);
     GenericBinaryOpStub stub(op, overwrite_mode, NO_SMI_CODE_IN_STUB);
-    answer = frame_->CallStub(&stub, 2);
+    answer = stub.GenerateCall(masm_, frame_, &left, &right);
   } else if (right_is_smi) {
     answer = ConstantSmiBinaryOperation(op, &left, right.handle(),
                                         type, false, overwrite_mode);
@@ -997,10 +995,8 @@
     if (loop_nesting() > 0 && (Token::IsBitOp(op) || type->IsLikelySmi())) {
       answer = LikelySmiBinaryOperation(op, &left, &right, overwrite_mode);
     } else {
-      frame_->Push(&left);
-      frame_->Push(&right);
       GenericBinaryOpStub stub(op, overwrite_mode, NO_GENERIC_BINARY_FLAGS);
-      answer = frame_->CallStub(&stub, 2);
+      answer = stub.GenerateCall(masm_, frame_, &left, &right);
     }
   }
   frame_->Push(&answer);
@@ -7076,6 +7072,21 @@
 }
 
 
+Result GenericBinaryOpStub::GenerateCall(MacroAssembler* masm,
+                                         VirtualFrame* frame,
+                                         Result* left,
+                                         Result* right) {
+  if (ArgsInRegistersSupported()) {
+    SetArgsInRegisters();
+    return frame->CallStub(this, left, right);
+  } else {
+    frame->Push(left);
+    frame->Push(right);
+    return frame->CallStub(this, 2);
+  }
+}
+
+
 void GenericBinaryOpStub::GenerateSmiCode(MacroAssembler* masm, Label* slow) {
   if (HasArgsInRegisters()) {
     __ mov(ebx, eax);
@@ -7107,7 +7118,13 @@
       __ j(overflow, &not_smis_or_overflow, not_taken);
       break;
 
+    case Token::MUL:
+      __ mov(edi, Operand(eax));  // backup the 1st operand

[Kevin Millikin (Chromium), 2010/01/26 09:07:22]

No need for Operand: __ mov(edi, eax).

Comment should be formatted like a sentence: Backup the left operand.

[Vladislav Kaznacheev, 2010/01/26 10:21:18]

Done.

+      break;
+
     case Token::DIV:
+      __ mov(edi, Operand(eax));  // backup the 1st operand
+      // Fall through.
     case Token::MOD:
       // Sign extend eax into edx:eax.
       __ cdq();
@@ -7243,28 +7260,21 @@
   __ bind(&use_fp_on_smis);
   // Both operands are known to be SMIs but the result does not fit into a SMI.
   switch (op_) {
+    case Token::MUL:
+    case Token::DIV:
+      __ mov(eax, edi);  // Restore the 1st operand.
+      // Fall through.
     case Token::ADD:
-    case Token::SUB:
-    case Token::MUL:
-    case Token::DIV: {
+    case Token::SUB: {
       Label after_alloc_failure;
+      __ AllocateHeapNumber(edx, ecx, no_reg, &after_alloc_failure);
 
-      FloatingPointHelper::ArgLocation arg_location =
-          (op_ == Token::ADD || op_ == Token::SUB) ?
-          FloatingPointHelper::ARGS_IN_REGISTERS :
-          FloatingPointHelper::ARGS_ON_STACK;
-
-      __ AllocateHeapNumber(
-          edx,
-          ecx,
-          no_reg,
-          arg_location == FloatingPointHelper::ARGS_IN_REGISTERS ?
-              &after_alloc_failure :
-              slow);
-
       if (CpuFeatures::IsSupported(SSE2)) {
         CpuFeatures::Scope use_sse2(SSE2);
-        FloatingPointHelper::LoadSse2Smis(masm, ecx, arg_location);
+        FloatingPointHelper::LoadSse2Smis(
+            masm,
+            ecx,
+            FloatingPointHelper::ARGS_IN_REGISTERS);

[Kevin Millikin (Chromium), 2010/01/26 09:07:22]

Does LoadSse2Smis need the ArgLocation argument any more?  It now expects them
in registers at all call sites.

[Vladislav Kaznacheev, 2010/01/26 10:21:18]

Removed (also for LoadFloatSmis).
On 2010/01/26 09:07:22, Kevin Millikin wrote:

         switch (op_) {
           case Token::ADD: __ addsd(xmm0, xmm1); break;
           case Token::SUB: __ subsd(xmm0, xmm1); break;
@@ -7274,7 +7284,10 @@
         }
         __ movdbl(FieldOperand(edx, HeapNumber::kValueOffset), xmm0);
       } else {  // SSE2 not available, use FPU.
-        FloatingPointHelper::LoadFloatSmis(masm, ecx, arg_location);
+        FloatingPointHelper::LoadFloatSmis(
+            masm,
+            ecx,
+            FloatingPointHelper::ARGS_IN_REGISTERS);
         switch (op_) {
           case Token::ADD: __ faddp(1); break;
           case Token::SUB: __ fsubp(1); break;
@@ -7287,12 +7300,10 @@
       __ mov(eax, edx);
       GenerateReturn(masm);
 
-      if (arg_location == FloatingPointHelper::ARGS_IN_REGISTERS) {
-        __ bind(&after_alloc_failure);
-        __ mov(edx, eax);
-        __ mov(eax, ebx);
-        __ jmp(slow);
-      }
+      __ bind(&after_alloc_failure);
+      __ mov(edx, eax);
+      __ mov(eax, ebx);
+      __ jmp(slow);
       break;
     }
 
@@ -7438,7 +7449,7 @@
         __ bind(&non_smi_result);
         // Allocate a heap number if needed.
         __ mov(ebx, Operand(eax));  // ebx: result
-       Label skip_allocation;
+        Label skip_allocation;
         switch (mode_) {
           case OVERWRITE_LEFT:
           case OVERWRITE_RIGHT: