Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(80)

Side by Side Diff: src/arm/assembler-arm.cc

Issue 552186: ARM: Implement native substring copying. (Closed)
Patch Set: Changed order of tests to bail out earlier on short substrings. Created 10 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
OLDNEW
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 65 matching lines...) Expand 10 before | Expand all | Expand 10 after
76 Register no_reg = { -1 }; 76 Register no_reg = { -1 };
77 77
78 Register r0 = { 0 }; 78 Register r0 = { 0 };
79 Register r1 = { 1 }; 79 Register r1 = { 1 };
80 Register r2 = { 2 }; 80 Register r2 = { 2 };
81 Register r3 = { 3 }; 81 Register r3 = { 3 };
82 Register r4 = { 4 }; 82 Register r4 = { 4 };
83 Register r5 = { 5 }; 83 Register r5 = { 5 };
84 Register r6 = { 6 }; 84 Register r6 = { 6 };
85 Register r7 = { 7 }; 85 Register r7 = { 7 };
86 Register r8 = { 8 }; 86 Register r8 = { 8 }; // Used as context register.
87 Register r9 = { 9 }; 87 Register r9 = { 9 };
88 Register r10 = { 10 }; 88 Register r10 = { 10 }; // Used as roots register.
89 Register fp = { 11 }; 89 Register fp = { 11 };
90 Register ip = { 12 }; 90 Register ip = { 12 };
91 Register sp = { 13 }; 91 Register sp = { 13 };
92 Register lr = { 14 }; 92 Register lr = { 14 };
93 Register pc = { 15 }; 93 Register pc = { 15 };
94 94
95 95
96 CRegister no_creg = { -1 }; 96 CRegister no_creg = { -1 };
97 97
98 CRegister cr0 = { 0 }; 98 CRegister cr0 = { 0 };
(...skipping 1743 matching lines...) Expand 10 before | Expand all | Expand 10 after
1842 bind(&after_pool); 1842 bind(&after_pool);
1843 } 1843 }
1844 1844
1845 // Since a constant pool was just emitted, move the check offset forward by 1845 // Since a constant pool was just emitted, move the check offset forward by
1846 // the standard interval. 1846 // the standard interval.
1847 next_buffer_check_ = pc_offset() + kCheckConstInterval; 1847 next_buffer_check_ = pc_offset() + kCheckConstInterval;
1848 } 1848 }
1849 1849
1850 1850
1851 } } // namespace v8::internal 1851 } } // namespace v8::internal
OLDNEW
« no previous file with comments | « src/arm/assembler-arm.h ('k') | src/arm/codegen-arm.h » ('j') | src/arm/codegen-arm.cc » ('J')

Powered by Google App Engine
This is Rietveld 408576698