Implementing inline caches for GenericBinaryOpStub. ...

src/ia32/codegen-ia32.h

Index: src/ia32/codegen-ia32.h
===================================================================
--- src/ia32/codegen-ia32.h	(revision 3626)
+++ src/ia32/codegen-ia32.h	(working copy)
@@ -629,6 +629,16 @@
 };
 
 
+// The order is important as it is relied upon by ShouldGenerate*Code methods.
+enum BinaryFastCase {
+  BINARY_OP_STUB_UNINITIALIZED,
+  BINARY_OP_STUB_GENERIC,
+  BINARY_OP_STUB_FAST_FP,
+  BINARY_OP_STUB_FAST_STRING_ADD,
+  BINARY_OP_STUB_FAST_RUNTIME
+};
+
+
 class GenericBinaryOpStub: public CodeStub {
  public:
   GenericBinaryOpStub(Token::Value op,
@@ -637,6 +647,7 @@
       : op_(op),
         mode_(mode),
         flags_(flags),
+        fast_case_(BINARY_OP_STUB_UNINITIALIZED),
         args_in_registers_(false),
         args_reversed_(false),
         name_(NULL) {
@@ -644,6 +655,18 @@
     ASSERT(OpBits::is_valid(Token::NUM_TOKENS));
   }
 
+  explicit GenericBinaryOpStub(int minor_key)
+      : op_(OpBits::decode(minor_key)),
+        mode_(ModeBits::decode(minor_key)),
+        flags_(FlagBits::decode(minor_key)),
+        fast_case_(FastCaseBits::decode(minor_key)),
+        args_in_registers_(ArgsInRegistersBits::decode(minor_key)),
+        args_reversed_(ArgsReversedBits::decode(minor_key)),
+        use_sse3_(SSE3Bits::decode(minor_key)),
+        name_(NULL) {
+    ASSERT(OpBits::is_valid(Token::NUM_TOKENS));
+  }
+
   // Generate code to call the stub with the supplied arguments. This will add
   // code at the call site to prepare arguments either in registers or on the
   // stack together with the actual call.
@@ -651,10 +674,14 @@
   void GenerateCall(MacroAssembler* masm, Register left, Smi* right);
   void GenerateCall(MacroAssembler* masm, Smi* left, Register right);
 
+  void FormatStaticParameters(char* name, int max_length);
+  const char* GetFastCaseName();
+
  private:
   Token::Value op_;
   OverwriteMode mode_;
   GenericBinaryFlags flags_;
+  BinaryFastCase fast_case_;
   bool args_in_registers_;  // Arguments passed in registers not on the stack.
   bool args_reversed_;  // Left and right argument are swapped.
   bool use_sse3_;
@@ -674,13 +701,14 @@
   }
 #endif
 
-  // Minor key encoding in 16 bits FRASOOOOOOOOOOMM.
+  // Minor key encoding in 16 bits CCCFRASOOOO0OOOMM.

[Mads Ager (chromium), 2010/01/22 12:14:26]

I think there is a zero '0' instead of the letter 'O' here? 

[vladislav.kaznacheev, 2010/01/22 14:09:42]

Made sure those are letter 'O's

   class ModeBits: public BitField<OverwriteMode, 0, 2> {};
-  class OpBits: public BitField<Token::Value, 2, 10> {};
-  class SSE3Bits: public BitField<bool, 12, 1> {};
-  class ArgsInRegistersBits: public BitField<bool, 13, 1> {};
-  class ArgsReversedBits: public BitField<bool, 14, 1> {};
-  class FlagBits: public BitField<GenericBinaryFlags, 15, 1> {};
+  class OpBits: public BitField<Token::Value, 2, 7> {};
+  class SSE3Bits: public BitField<bool, 9, 1> {};
+  class ArgsInRegistersBits: public BitField<bool, 10, 1> {};
+  class ArgsReversedBits: public BitField<bool, 11, 1> {};
+  class FlagBits: public BitField<GenericBinaryFlags, 12, 1> {};
+  class FastCaseBits: public BitField<BinaryFastCase, 13, 3> {};
 
   Major MajorKey() { return GenericBinaryOp; }
   int MinorKey() {
@@ -688,6 +716,7 @@
     return OpBits::encode(op_)
            | ModeBits::encode(mode_)
            | FlagBits::encode(flags_)
+           | FastCaseBits::encode(fast_case_)
            | SSE3Bits::encode(use_sse3_)
            | ArgsInRegistersBits::encode(args_in_registers_)
            | ArgsReversedBits::encode(args_reversed_);
@@ -695,13 +724,18 @@
 
   void Generate(MacroAssembler* masm);
   void GenerateSmiCode(MacroAssembler* masm, Label* slow);
+  void GenerateHeapResultAllocation(MacroAssembler* masm, Label* alloc_failure);
+  void GenerateRegisterArgumentsPush(MacroAssembler* masm);
   void GenerateLoadArguments(MacroAssembler* masm);
   void GenerateReturn(MacroAssembler* masm);
 
+  // Args in registers are always OK for ADD and SUB.
+  // MUL and DIV on SMIs modify the original registers so we need to push args
+  // on stack anyway. MUL and DIV on floats are OK.
   bool ArgsInRegistersSupported() {
-    return ((op_ == Token::ADD) || (op_ == Token::SUB)
-            || (op_ == Token::MUL) || (op_ == Token::DIV))
-        && flags_ != NO_SMI_CODE_IN_STUB;
+    return ((op_ == Token::ADD) || (op_ == Token::SUB)) ||
+           (((op_ == Token::MUL) || (op_ == Token::DIV)) &&
+             (flags_ == NO_SMI_CODE_IN_STUB));
   }
   bool IsOperationCommutative() {
     return (op_ == Token::ADD) || (op_ == Token::MUL);
@@ -712,6 +746,48 @@
   bool HasSmiCodeInStub() { return (flags_ & NO_SMI_CODE_IN_STUB) == 0; }
   bool HasArgumentsInRegisters() { return args_in_registers_; }
   bool HasArgumentsReversed() { return args_reversed_; }
+
+  bool ShouldGenerateSmiCode() {
+    return HasSmiCodeInStub() && (fast_case_ < BINARY_OP_STUB_FAST_FP);

[Mads Ager (chromium), 2010/01/22 12:14:26]

This is not really related to this method itself, but can we get in a situation
where HasSmiCodeInStub() returns true and fast_case_ == BINARY_OP_STUB_FAST_FP? 
We should make sure that we cannot get in that situation to make sure that we do
not get two different stubs with the same code.

I guess we only want the Smi code for the generic stub?  Test explicitly for
fast_case_ == BINARY_OP_STUB_GENERIC?

[vladislav.kaznacheev, 2010/01/22 14:09:42]

This is taken care of in GetFastCase method. It makes sure that if
NO_SMI_CODE_IN_STUB is set the FAST_FP stub is never generated (GENERIC is
generated insted).
On 2010/01/22 12:14:26, Mads Ager wrote:

+  }
+
+  bool ShouldGenerateFPCode() {
+    return fast_case_ <= BINARY_OP_STUB_FAST_FP;
+  }
+
+  bool ShouldGenerateStringAddCode() {
+    return fast_case_ <= BINARY_OP_STUB_FAST_STRING_ADD;
+  }
+
+  virtual int GetCodeKind() { return Code::BINARY_OP_IC; }
+
+  virtual int GetICState();
+
+  static int TransitionMinorKey(int key, BinaryFastCase fast_case) {
+    return (key & ~FastCaseBits::mask()) | FastCaseBits::encode(fast_case);
+  }
+
+  BinaryFastCase GetFastCase(BinaryFastCase target_case);
+  void GenerateFastCaseSwitch(MacroAssembler* masm, BinaryFastCase fast_case);
+
+  void GenerateBuiltinCallPrologue(MacroAssembler* masm);
+  void GenerateBuiltinCallEpilogue(MacroAssembler* masm);
+
+  void GenerateBuiltinTailCall(MacroAssembler* masm,
+                               Builtins::JavaScript id,
+                               Label* exit_via_builtin);
+
+  void GenerateSwitchAndReturn(MacroAssembler* target_fast_case,
+                               BinaryFastCase target_case);
+
+  void GenerateSwitchViaBuiltin(MacroAssembler* masm,
+                                Builtins::JavaScript id,
+                                Label* exit_via_builtin,
+                                BinaryFastCase target_fast_case);
+
+  void GenerateSwitchViaStub(MacroAssembler* masm,
+                             CodeStub& stub,
+                             BinaryFastCase target_fast_case);
 };