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Issue 548007: arm: fix thumb/debug build... (Closed) Base URL: http://v8.googlecode.com/svn/trunk/
Patch Set: Created 10 years, 11 months ago
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1 // Copyright 2006-2009 the V8 project authors. All rights reserved. 1 // Copyright 2006-2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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54 // syscall(__ARM_NR_cacheflush, start, 54 // syscall(__ARM_NR_cacheflush, start,
55 // reinterpret_cast<intptr_t>(start) + size, 0); 55 // reinterpret_cast<intptr_t>(start) + size, 0);
56 // however, syscall(int, ...) is not supported on all platforms, especially 56 // however, syscall(int, ...) is not supported on all platforms, especially
57 // not when using EABI, so we call the __ARM_NR_cacheflush syscall directly. 57 // not when using EABI, so we call the __ARM_NR_cacheflush syscall directly.
58 58
59 register uint32_t beg asm("a1") = reinterpret_cast<uint32_t>(start); 59 register uint32_t beg asm("a1") = reinterpret_cast<uint32_t>(start);
60 register uint32_t end asm("a2") = 60 register uint32_t end asm("a2") =
61 reinterpret_cast<uint32_t>(start) + size; 61 reinterpret_cast<uint32_t>(start) + size;
62 register uint32_t flg asm("a3") = 0; 62 register uint32_t flg asm("a3") = 0;
63 #ifdef __ARM_EABI__ 63 #ifdef __ARM_EABI__
64 register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
65 #if defined (__arm__) && !defined(__thumb__) 64 #if defined (__arm__) && !defined(__thumb__)
66 // __arm__ may be defined in thumb mode. 65 // __arm__ may be defined in thumb mode.
66 register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
67 asm volatile( 67 asm volatile(
68 "swi 0x0" 68 "swi 0x0"
69 : "=r" (beg) 69 : "=r" (beg)
70 : "0" (beg), "r" (end), "r" (flg), "r" (scno)); 70 : "0" (beg), "r" (end), "r" (flg), "r" (scno));
71 #else 71 #else
72 // r7 is reserved by the EABI in thumb mode.
72 asm volatile( 73 asm volatile(
73 "@ Enter ARM Mode \n\t" 74 "@ Enter ARM Mode \n\t"
74 "adr r3, 1f \n\t" 75 "adr r3, 1f \n\t"
75 "bx r3 \n\t" 76 "bx r3 \n\t"
76 ".ALIGN 4 \n\t" 77 ".ALIGN 4 \n\t"
77 ".ARM \n" 78 ".ARM \n"
78 "1: swi 0x0 \n\t" 79 "1: push {r7} \n\t"
80 "mov r7, %4 \n\t"
81 "swi 0x0 \n\t"
82 "pop {r7} \n\t"
79 "@ Enter THUMB Mode\n\t" 83 "@ Enter THUMB Mode\n\t"
80 "adr r3, 2f+1 \n\t" 84 "adr r3, 2f+1 \n\t"
81 "bx r3 \n\t" 85 "bx r3 \n\t"
82 ".THUMB \n" 86 ".THUMB \n"
83 "2: \n\t" 87 "2: \n\t"
84 : "=r" (beg) 88 : "=r" (beg)
85 : "0" (beg), "r" (end), "r" (flg), "r" (scno) 89 : "0" (beg), "r" (end), "r" (flg), "r" (__ARM_NR_cacheflush)
86 : "r3"); 90 : "r3");
87 #endif 91 #endif
88 #else 92 #else
89 #if defined (__arm__) && !defined(__thumb__) 93 #if defined (__arm__) && !defined(__thumb__)
90 // __arm__ may be defined in thumb mode. 94 // __arm__ may be defined in thumb mode.
91 asm volatile( 95 asm volatile(
92 "swi %1" 96 "swi %1"
93 : "=r" (beg) 97 : "=r" (beg)
94 : "i" (__ARM_NR_cacheflush), "0" (beg), "r" (end), "r" (flg)); 98 : "i" (__ARM_NR_cacheflush), "0" (beg), "r" (end), "r" (flg));
95 #else 99 #else
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119 123
120 void CPU::DebugBreak() { 124 void CPU::DebugBreak() {
121 #if !defined (__arm__) 125 #if !defined (__arm__)
122 UNIMPLEMENTED(); // when building ARM emulator target 126 UNIMPLEMENTED(); // when building ARM emulator target
123 #else 127 #else
124 asm volatile("bkpt 0"); 128 asm volatile("bkpt 0");
125 #endif 129 #endif
126 } 130 }
127 131
128 } } // namespace v8::internal 132 } } // namespace v8::internal
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