arm: fix thumb/debug build...

src/arm/cpu-arm.cc

 // Copyright 2006-2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 43 matching lines @@
   //   syscall(__ARM_NR_cacheflush, start,
   //           reinterpret_cast<intptr_t>(start) + size, 0);
   // however, syscall(int, ...) is not supported on all platforms, especially
   // not when using EABI, so we call the __ARM_NR_cacheflush syscall directly.
 
   register uint32_t beg asm("a1") = reinterpret_cast<uint32_t>(start);
   register uint32_t end asm("a2") =
       reinterpret_cast<uint32_t>(start) + size;
   register uint32_t flg asm("a3") = 0;
   #ifdef __ARM_EABI__
-    register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
     #if defined (__arm__) && !defined(__thumb__)
       // __arm__ may be defined in thumb mode.
+      register uint32_t scno asm("r7") = __ARM_NR_cacheflush;
       asm volatile(
           "swi 0x0"
           : "=r" (beg)
           : "0" (beg), "r" (end), "r" (flg), "r" (scno));
     #else
+      // r7 is reserved by the EABI in thumb mode.
       asm volatile(
       "@   Enter ARM Mode  \n\t"
           "adr r3, 1f      \n\t"
           "bx  r3          \n\t"
           ".ALIGN 4        \n\t"
           ".ARM            \n"
-      "1:  swi 0x0         \n\t"
+      "1:  push {r7}       \n\t"
+          "mov r7, %4      \n\t"
+          "swi 0x0         \n\t"
+          "pop {r7}        \n\t"
       "@   Enter THUMB Mode\n\t"
           "adr r3, 2f+1    \n\t"
           "bx  r3          \n\t"
           ".THUMB          \n"
       "2:                  \n\t"
           : "=r" (beg)
-          : "0" (beg), "r" (end), "r" (flg), "r" (scno)
+          : "0" (beg), "r" (end), "r" (flg), "r" (__ARM_NR_cacheflush)
           : "r3");
     #endif
   #else
     #if defined (__arm__) && !defined(__thumb__)
       // __arm__ may be defined in thumb mode.
       asm volatile(
           "swi %1"
           : "=r" (beg)
           : "i" (__ARM_NR_cacheflush), "0" (beg), "r" (end), "r" (flg));
     #else
@@ skipping 23 matching lines @@
 
 void CPU::DebugBreak() {
 #if !defined (__arm__)
   UNIMPLEMENTED();  // when building ARM emulator target
 #else
   asm volatile("bkpt 0");
 #endif
 }
 
 } }  // namespace v8::internal