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Issue 548002: Add missing instructions to the IA-32 disasembler... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 11 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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568 568
569 569
570 void Assembler::leave() { 570 void Assembler::leave() {
571 EnsureSpace ensure_space(this); 571 EnsureSpace ensure_space(this);
572 last_pc_ = pc_; 572 last_pc_ = pc_;
573 EMIT(0xC9); 573 EMIT(0xC9);
574 } 574 }
575 575
576 576
577 void Assembler::mov_b(Register dst, const Operand& src) { 577 void Assembler::mov_b(Register dst, const Operand& src) {
578 ASSERT(dst.code() < 4);
578 EnsureSpace ensure_space(this); 579 EnsureSpace ensure_space(this);
579 last_pc_ = pc_; 580 last_pc_ = pc_;
580 EMIT(0x8A); 581 EMIT(0x8A);
581 emit_operand(dst, src); 582 emit_operand(dst, src);
582 } 583 }
583 584
584 585
585 void Assembler::mov_b(const Operand& dst, int8_t imm8) { 586 void Assembler::mov_b(const Operand& dst, int8_t imm8) {
586 EnsureSpace ensure_space(this); 587 EnsureSpace ensure_space(this);
587 last_pc_ = pc_; 588 last_pc_ = pc_;
588 EMIT(0xC6); 589 EMIT(0xC6);
589 emit_operand(eax, dst); 590 emit_operand(eax, dst);
590 EMIT(imm8); 591 EMIT(imm8);
591 } 592 }
592 593
593 594
594 void Assembler::mov_b(const Operand& dst, Register src) { 595 void Assembler::mov_b(const Operand& dst, Register src) {
596 ASSERT(src.code() < 4);
595 EnsureSpace ensure_space(this); 597 EnsureSpace ensure_space(this);
596 last_pc_ = pc_; 598 last_pc_ = pc_;
597 EMIT(0x88); 599 EMIT(0x88);
598 emit_operand(src, dst); 600 emit_operand(src, dst);
599 } 601 }
600 602
601 603
602 void Assembler::mov_w(Register dst, const Operand& src) { 604 void Assembler::mov_w(Register dst, const Operand& src) {
603 EnsureSpace ensure_space(this); 605 EnsureSpace ensure_space(this);
604 last_pc_ = pc_; 606 last_pc_ = pc_;
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1201 1203
1202 void Assembler::sub(Register dst, const Operand& src) { 1204 void Assembler::sub(Register dst, const Operand& src) {
1203 EnsureSpace ensure_space(this); 1205 EnsureSpace ensure_space(this);
1204 last_pc_ = pc_; 1206 last_pc_ = pc_;
1205 EMIT(0x2B); 1207 EMIT(0x2B);
1206 emit_operand(dst, src); 1208 emit_operand(dst, src);
1207 } 1209 }
1208 1210
1209 1211
1210 void Assembler::subb(Register dst, const Operand& src) { 1212 void Assembler::subb(Register dst, const Operand& src) {
1213 ASSERT(dst.code() < 4);
1211 EnsureSpace ensure_space(this); 1214 EnsureSpace ensure_space(this);
1212 last_pc_ = pc_; 1215 last_pc_ = pc_;
1213 EMIT(0x2A); 1216 EMIT(0x2A);
1214 emit_operand(dst, src); 1217 emit_operand(dst, src);
1215 } 1218 }
1216 1219
1217 1220
1218 void Assembler::sub(const Operand& dst, Register src) { 1221 void Assembler::sub(const Operand& dst, Register src) {
1219 EnsureSpace ensure_space(this); 1222 EnsureSpace ensure_space(this);
1220 last_pc_ = pc_; 1223 last_pc_ = pc_;
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1593 EnsureSpace ensure_space(this); 1596 EnsureSpace ensure_space(this);
1594 last_pc_ = pc_; 1597 last_pc_ = pc_;
1595 if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint); 1598 if (FLAG_emit_branch_hints && hint != no_hint) EMIT(hint);
1596 // 0000 1111 1000 tttn #32-bit disp 1599 // 0000 1111 1000 tttn #32-bit disp
1597 EMIT(0x0F); 1600 EMIT(0x0F);
1598 EMIT(0x80 | cc); 1601 EMIT(0x80 | cc);
1599 emit(reinterpret_cast<intptr_t>(code.location()), RelocInfo::CODE_TARGET); 1602 emit(reinterpret_cast<intptr_t>(code.location()), RelocInfo::CODE_TARGET);
1600 } 1603 }
1601 1604
1602 1605
1603 void Assembler::loope(Label* L) {
1604 EnsureSpace ensure_space(this);
1605 last_pc_ = pc_;
1606 // Only short backward jumps.
1607 ASSERT(L->is_bound());
1608 int offs = L->pos() - pc_offset();
1609 const int kLoopInstructionSize = 2;
1610 ASSERT(is_int8(offs - kLoopInstructionSize));
1611 EMIT(0xE1);
1612 EMIT((offs - kLoopInstructionSize) & 0xFF);
1613 }
1614
1615 // FPU instructions 1606 // FPU instructions
1616 1607
1617
1618 void Assembler::fld(int i) { 1608 void Assembler::fld(int i) {
1619 EnsureSpace ensure_space(this); 1609 EnsureSpace ensure_space(this);
1620 last_pc_ = pc_; 1610 last_pc_ = pc_;
1621 emit_farith(0xD9, 0xC0, i); 1611 emit_farith(0xD9, 0xC0, i);
1622 } 1612 }
1623 1613
1624 1614
1625 void Assembler::fld1() { 1615 void Assembler::fld1() {
1626 EnsureSpace ensure_space(this); 1616 EnsureSpace ensure_space(this);
1627 last_pc_ = pc_; 1617 last_pc_ = pc_;
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2376 push_insn[1] = 13; // Skip over coverage insns. 2366 push_insn[1] = 13; // Skip over coverage insns.
2377 if (coverage_log != NULL) { 2367 if (coverage_log != NULL) {
2378 fprintf(coverage_log, "%s\n", file_line); 2368 fprintf(coverage_log, "%s\n", file_line);
2379 fflush(coverage_log); 2369 fflush(coverage_log);
2380 } 2370 }
2381 } 2371 }
2382 2372
2383 #endif 2373 #endif
2384 2374
2385 } } // namespace v8::internal 2375 } } // namespace v8::internal
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