OLD | NEW |
1 // Copyright 2007-2008 the V8 project authors. All rights reserved. | 1 // Copyright 2007-2008 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
(...skipping 45 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
56 {0x21, "and", OPER_REG_OP_ORDER}, | 56 {0x21, "and", OPER_REG_OP_ORDER}, |
57 {0x23, "and", REG_OPER_OP_ORDER}, | 57 {0x23, "and", REG_OPER_OP_ORDER}, |
58 {0x3B, "cmp", REG_OPER_OP_ORDER}, | 58 {0x3B, "cmp", REG_OPER_OP_ORDER}, |
59 {0x8D, "lea", REG_OPER_OP_ORDER}, | 59 {0x8D, "lea", REG_OPER_OP_ORDER}, |
60 {0x09, "or", OPER_REG_OP_ORDER}, | 60 {0x09, "or", OPER_REG_OP_ORDER}, |
61 {0x0B, "or", REG_OPER_OP_ORDER}, | 61 {0x0B, "or", REG_OPER_OP_ORDER}, |
62 {0x1B, "sbb", REG_OPER_OP_ORDER}, | 62 {0x1B, "sbb", REG_OPER_OP_ORDER}, |
63 {0x29, "sub", OPER_REG_OP_ORDER}, | 63 {0x29, "sub", OPER_REG_OP_ORDER}, |
64 {0x2A, "subb", REG_OPER_OP_ORDER}, | 64 {0x2A, "subb", REG_OPER_OP_ORDER}, |
65 {0x2B, "sub", REG_OPER_OP_ORDER}, | 65 {0x2B, "sub", REG_OPER_OP_ORDER}, |
| 66 {0x84, "test_b", REG_OPER_OP_ORDER}, |
66 {0x85, "test", REG_OPER_OP_ORDER}, | 67 {0x85, "test", REG_OPER_OP_ORDER}, |
67 {0x31, "xor", OPER_REG_OP_ORDER}, | 68 {0x31, "xor", OPER_REG_OP_ORDER}, |
68 {0x33, "xor", REG_OPER_OP_ORDER}, | 69 {0x33, "xor", REG_OPER_OP_ORDER}, |
69 {0x87, "xchg", REG_OPER_OP_ORDER}, | 70 {0x87, "xchg", REG_OPER_OP_ORDER}, |
70 {0x8A, "mov_b", REG_OPER_OP_ORDER}, | 71 {0x8A, "mov_b", REG_OPER_OP_ORDER}, |
71 {0x8B, "mov", REG_OPER_OP_ORDER}, | 72 {0x8B, "mov", REG_OPER_OP_ORDER}, |
72 {-1, "", UNSET_OP_ORDER} | 73 {-1, "", UNSET_OP_ORDER} |
73 }; | 74 }; |
74 | 75 |
75 | 76 |
(...skipping 1272 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1348 } | 1349 } |
1349 for (int i = 6 - (pc - prev_pc); i >= 0; i--) { | 1350 for (int i = 6 - (pc - prev_pc); i >= 0; i--) { |
1350 fprintf(f, " "); | 1351 fprintf(f, " "); |
1351 } | 1352 } |
1352 fprintf(f, " %s\n", buffer.start()); | 1353 fprintf(f, " %s\n", buffer.start()); |
1353 } | 1354 } |
1354 } | 1355 } |
1355 | 1356 |
1356 | 1357 |
1357 } // namespace disasm | 1358 } // namespace disasm |
OLD | NEW |