Added two missing instructions to disassembler....

src/ia32/disasm-ia32.cc

 // Copyright 2007-2008 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 43 matching lines @@
 static ByteMnemonic two_operands_instr[] = {
   {0x03, "add", REG_OPER_OP_ORDER},
   {0x21, "and", OPER_REG_OP_ORDER},
   {0x23, "and", REG_OPER_OP_ORDER},
   {0x3B, "cmp", REG_OPER_OP_ORDER},
   {0x8D, "lea", REG_OPER_OP_ORDER},
   {0x09, "or", OPER_REG_OP_ORDER},
   {0x0B, "or", REG_OPER_OP_ORDER},
   {0x1B, "sbb", REG_OPER_OP_ORDER},
   {0x29, "sub", OPER_REG_OP_ORDER},
+  {0x2A, "subb", REG_OPER_OP_ORDER},
   {0x2B, "sub", REG_OPER_OP_ORDER},
   {0x85, "test", REG_OPER_OP_ORDER},
   {0x31, "xor", OPER_REG_OP_ORDER},
   {0x33, "xor", REG_OPER_OP_ORDER},
   {0x87, "xchg", REG_OPER_OP_ORDER},
   {0x8A, "mov_b", REG_OPER_OP_ORDER},
   {0x8B, "mov", REG_OPER_OP_ORDER},
   {-1, "", UNSET_OP_ORDER}
 };
 
@@ skipping 35 matching lines @@
 
 
 static const char* jump_conditional_mnem[] = {
   /*0*/ "jo", "jno", "jc", "jnc",
   /*4*/ "jz", "jnz", "jna", "ja",
   /*8*/ "js", "jns", "jpe", "jpo",
   /*12*/ "jl", "jnl", "jng", "jg"
 };
 
 
+static const char* loop_mnem[] = {
+  "loopne", "loope", "loop"
+};
+
+
 static const char* set_conditional_mnem[] = {
   /*0*/ "seto", "setno", "setc", "setnc",
   /*4*/ "setz", "setnz", "setna", "seta",
   /*8*/ "sets", "setns", "setpe", "setpo",
   /*12*/ "setl", "setnl", "setng", "setg"
 };
 
 
 static const char* conditional_move_mnem[] = {
   /*0*/ "cmovo", "cmovno", "cmovc", "cmovnc",
   /*4*/ "cmovz", "cmovnz", "cmovna", "cmova",
   /*8*/ "cmovs", "cmovns", "cmovpe", "cmovpo",
   /*12*/ "cmovl", "cmovnl", "cmovng", "cmovg"
 };
 
 
 enum InstructionType {
   NO_INSTR,
   ZERO_OPERANDS_INSTR,
   TWO_OPERANDS_INSTR,
   JUMP_CONDITIONAL_SHORT_INSTR,
+  LOOP_INSTR,
   REGISTER_INSTR,
   MOVE_REG_INSTR,
   CALL_JUMP_INSTR,
   SHORT_IMMEDIATE_INSTR
 };
 
 
 struct InstructionDesc {
   const char* mnem;
   InstructionType type;
   OperandOrder op_order_;
 };
 
 
 class InstructionTable {
  public:
   InstructionTable();
   const InstructionDesc& Get(byte x) const { return instructions_[x]; }
 
  private:
   InstructionDesc instructions_[256];
   void Clear();
   void Init();
   void CopyTable(ByteMnemonic bm[], InstructionType type);
   void SetTableRange(InstructionType type,
                      byte start,
                      byte end,
                      const char* mnem);
   void AddJumpConditionalShort();
+  void AddLoop();
 };
 
 
 InstructionTable::InstructionTable() {
   Clear();
   Init();
 }
 
 
 void InstructionTable::Clear() {
   for (int i = 0; i < 256; i++) {
     instructions_[i].mnem = "";
     instructions_[i].type = NO_INSTR;
     instructions_[i].op_order_ = UNSET_OP_ORDER;
   }
 }
 
 
 void InstructionTable::Init() {
   CopyTable(two_operands_instr, TWO_OPERANDS_INSTR);
   CopyTable(zero_operands_instr, ZERO_OPERANDS_INSTR);
   CopyTable(call_jump_instr, CALL_JUMP_INSTR);
   CopyTable(short_immediate_instr, SHORT_IMMEDIATE_INSTR);
   AddJumpConditionalShort();
+  AddLoop();
   SetTableRange(REGISTER_INSTR, 0x40, 0x47, "inc");
   SetTableRange(REGISTER_INSTR, 0x48, 0x4F, "dec");
   SetTableRange(REGISTER_INSTR, 0x50, 0x57, "push");
   SetTableRange(REGISTER_INSTR, 0x58, 0x5F, "pop");
   SetTableRange(REGISTER_INSTR, 0x91, 0x97, "xchg eax,");  // 0x90 is nop.
   SetTableRange(MOVE_REG_INSTR, 0xB8, 0xBF, "mov");
 }
 
 
 void InstructionTable::CopyTable(ByteMnemonic bm[], InstructionType type) {
@@ skipping 23 matching lines @@
 void InstructionTable::AddJumpConditionalShort() {
   for (byte b = 0x70; b <= 0x7F; b++) {
     InstructionDesc* id = &instructions_[b];
     ASSERT_EQ(NO_INSTR, id->type);  // Information not already entered.
     id->mnem = jump_conditional_mnem[b & 0x0F];
     id->type = JUMP_CONDITIONAL_SHORT_INSTR;
   }
 }
 
 
+void InstructionTable::AddLoop() {
+  for (byte b = 0xE0; b <= 0xE2; b++) {
+    InstructionDesc* id = &instructions_[b];
+    ASSERT_EQ(NO_INSTR, id->type);  // Information not already entered.
+    id->mnem = loop_mnem[b & 0x03];
+    id->type = LOOP_INSTR;
+  }
+}
+
+
 static InstructionTable instruction_table;
 
 
 // The IA32 disassembler implementation.
 class DisassemblerIA32 {
  public:
   DisassemblerIA32(const NameConverter& converter,
                    bool abort_on_unimplemented = true)
       : converter_(converter),
         tmp_buffer_pos_(0),
@@ skipping 76 matching lines @@
   int PrintRightOperandHelper(byte* modrmp, RegisterNameMapping register_name);
   int PrintRightOperand(byte* modrmp);
   int PrintRightByteOperand(byte* modrmp);
   int PrintOperands(const char* mnem, OperandOrder op_order, byte* data);
   int PrintImmediateOp(byte* data);
   int F7Instruction(byte* data);
   int D1D3C1Instruction(byte* data);
   int JumpShort(byte* data);
   int JumpConditional(byte* data, const char* comment);
   int JumpConditionalShort(byte* data, const char* comment);
+  int Loop(byte* data);
   int SetCC(byte* data);
   int CMov(byte* data);
   int FPUInstruction(byte* data);
   int MemoryFPUInstruction(int escape_opcode, int regop, byte* modrm_start);
   int RegisterFPUInstruction(int escape_opcode, byte modrm_byte);
   void AppendToBuffer(const char* format, ...);
 
 
   void UnimplementedInstruction() {
     if (abort_on_unimplemented_) {
@@ skipping 268 matching lines @@
   const char* mnem = jump_conditional_mnem[cond];
   AppendToBuffer("%s %s", mnem, NameOfAddress(dest));
   if (comment != NULL) {
     AppendToBuffer(", %s", comment);
   }
   return 2;
 }
 
 
 // Returns number of bytes used, including *data.
+int DisassemblerIA32::Loop(byte* data) {
+  byte cond = *data & 0x03;
+  byte b = *(data+1);
+  byte* dest = data + static_cast<int8_t>(b) + 2;
+  const char* mnem = loop_mnem[cond];
+  AppendToBuffer("%s %s", mnem, NameOfAddress(dest));
+  return 2;
+}
+
+
+// Returns number of bytes used, including *data.
 int DisassemblerIA32::SetCC(byte* data) {
   ASSERT_EQ(0x0F, *data);
   byte cond = *(data+1) & 0x0F;
   const char* mnem = set_conditional_mnem[cond];
   AppendToBuffer("%s ", mnem);
   PrintRightByteOperand(data+2);
   return 3;  // Includes 0x0F.
 }
 
 
@@ skipping 217 matching lines @@
 
     case TWO_OPERANDS_INSTR:
       data++;
       data += PrintOperands(idesc.mnem, idesc.op_order_, data);
       break;
 
     case JUMP_CONDITIONAL_SHORT_INSTR:
       data += JumpConditionalShort(data, branch_hint);
       break;
 
+    case LOOP_INSTR:
+      data += Loop(data);
+      break;
+
     case REGISTER_INSTR:
       AppendToBuffer("%s %s", idesc.mnem, NameOfCPURegister(*data & 0x07));
       data++;
       break;
 
     case MOVE_REG_INSTR: {
       byte* addr = reinterpret_cast<byte*>(*reinterpret_cast<int32_t*>(data+1));
       AppendToBuffer("mov %s,%s",
                      NameOfCPURegister(*data & 0x07),
                      NameOfAddress(addr));
@@ skipping 430 matching lines @@
     }
     for (int i = 6 - (pc - prev_pc); i >= 0; i--) {
       fprintf(f, "  ");
     }
     fprintf(f, "  %s\n", buffer.start());
   }
 }
 
 
 }  // namespace disasm