| Index: src/ia32/assembler-ia32.cc
|
| ===================================================================
|
| --- src/ia32/assembler-ia32.cc (revision 3551)
|
| +++ src/ia32/assembler-ia32.cc (working copy)
|
| @@ -752,6 +752,14 @@
|
| }
|
|
|
|
|
| +void Assembler::rep_movs() {
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0xF3);
|
| + EMIT(0xA5);
|
| +}
|
| +
|
| +
|
| void Assembler::xchg(Register dst, Register src) {
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
| @@ -2035,6 +2043,50 @@
|
| }
|
|
|
|
|
| +void Assembler::movdqa(const Operand& dst, XMMRegister src ) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0x7F);
|
| + emit_sse_operand(src, dst);
|
| +}
|
| +
|
| +
|
| +void Assembler::movdqa(XMMRegister dst, const Operand& src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0x6F);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| +void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0xF3);
|
| + EMIT(0x0F);
|
| + EMIT(0x7F);
|
| + emit_sse_operand(src, dst);
|
| +}
|
| +
|
| +
|
| +void Assembler::movdqu(XMMRegister dst, const Operand& src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0xF3);
|
| + EMIT(0x0F);
|
| + EMIT(0x6F);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| void Assembler::movdbl(XMMRegister dst, const Operand& src) {
|
| EnsureSpace ensure_space(this);
|
| last_pc_ = pc_;
|
|
|