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Unified Diff: src/arm/assembler-arm-inl.h

Issue 5140002: Generate inline code for contextual loads on ARM.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 1 month ago
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Index: src/arm/assembler-arm-inl.h
===================================================================
--- src/arm/assembler-arm-inl.h (revision 5874)
+++ src/arm/assembler-arm-inl.h (working copy)
@@ -164,7 +164,7 @@
bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
Instr current_instr = Assembler::instr_at(pc_);
- return !Assembler::IsNop(current_instr, 2);
+ return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
}
@@ -288,9 +288,7 @@
}
#endif
- // Verify that the instruction to patch is a
- // ldr<cond> <Rd>, [pc +/- offset_12].
- ASSERT((instr & 0x0f7f0000) == 0x051f0000);
+ ASSERT(IsLdrPcImmediateOffset(instr));
int offset = instr & 0xfff; // offset_12 is unsigned
if ((instr & (1 << 23)) == 0) offset = -offset; // U bit defines offset sign
// Verify that the constant pool comes after the instruction referencing it.

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