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Issue 4841001:
Tegra2: implement Warmboot code and lp0_vec (Closed)
Base URL: http://git.chromium.org/git/u-boot-next.git@chromeos-v2010.09| OLD | NEW |
|---|---|
| 1 /* | 1 /* |
| 2 * (C) Copyright 2010 | 2 * (C) Copyright 2010 |
| 3 * NVIDIA Corporation <www.nvidia.com> | 3 * NVIDIA Corporation <www.nvidia.com> |
| 4 * | 4 * |
| 5 * See file CREDITS for list of people who contributed to this | 5 * See file CREDITS for list of people who contributed to this |
| 6 * project. | 6 * project. |
| 7 * | 7 * |
| 8 * This program is free software; you can redistribute it and/or | 8 * This program is free software; you can redistribute it and/or |
| 9 * modify it under the terms of the GNU General Public License as | 9 * modify it under the terms of the GNU General Public License as |
| 10 * published by the Free Software Foundation; either version 2 of | 10 * published by the Free Software Foundation; either version 2 of |
| (...skipping 18 matching lines...) Expand all Loading... | |
| 29 | 29 |
| 30 #define CONFIG_SERIAL_MULTI 1 | 30 #define CONFIG_SERIAL_MULTI 1 |
| 31 #define CONFIG_TEGRA2_ENABLE_UARTD 1 | 31 #define CONFIG_TEGRA2_ENABLE_UARTD 1 |
| 32 | 32 |
| 33 /* UARTD: keyboard satellite board uart, default */ | 33 /* UARTD: keyboard satellite board uart, default */ |
| 34 #define CONFIG_SYS_NS16550_COM1 NV_ADDRESS_MAP_APB_UARTD_BASE | 34 #define CONFIG_SYS_NS16550_COM1 NV_ADDRESS_MAP_APB_UARTD_BASE |
| 35 | 35 |
| 36 /* UARTA: debug board uart */ | 36 /* UARTA: debug board uart */ |
| 37 #define CONFIG_SYS_NS16550_COM2 NV_ADDRESS_MAP_APB_UARTA_BASE | 37 #define CONFIG_SYS_NS16550_COM2 NV_ADDRESS_MAP_APB_UARTA_BASE |
| 38 | 38 |
| 39 #ifdef CONFIG_TEGRA2_LP0 | |
| 40 #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 41 CONFIG_TEGRA_ENV_SETTINGS \ | |
| 42 "platform_extras=mem=384M@0M nvmem=128M@384M mem=512M@512M "\ | |
|
Tom Warren
2010/11/16 16:44:11
Cleaner to just put the #ifdef CONFIG_TEGRA2_LP0 h
yelin
2010/11/16 23:41:04
I was hoping I can do that way too. But, that does
| |
| 43 "lp0_vec="TEGRA_LP0_SIZE_STR"@"TEGRA_LP0_DEFAULT_ADDR_STR "\0" | |
| 44 #else | |
| 39 #define CONFIG_EXTRA_ENV_SETTINGS \ | 45 #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 40 CONFIG_TEGRA_ENV_SETTINGS \ | 46 CONFIG_TEGRA_ENV_SETTINGS \ |
| 41 "platform_extras=mem=384M@0M nvmem=128M@384M mem=512M@512M\0" | 47 "platform_extras=mem=384M@0M nvmem=128M@384M mem=512M@512M\0" |
| 48 #endif | |
| 42 | 49 |
| 43 #define LINUX_MACH_TYPE MACH_TYPE_TEGRA_SEABOARD | 50 #define LINUX_MACH_TYPE MACH_TYPE_TEGRA_SEABOARD |
| 44 #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 //lp1, 1GB | 51 #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 //lp1, 1GB |
| 45 | 52 |
| 46 #define CONFIG_I2CP_PIN_MUX 1 | 53 #define CONFIG_I2CP_PIN_MUX 1 |
| 47 #define CONFIG_I2C1_PIN_MUX 1 | 54 #define CONFIG_I2C1_PIN_MUX 1 |
| 48 #define CONFIG_I2C2_PIN_MUX 2 | 55 #define CONFIG_I2C2_PIN_MUX 2 |
| 49 #define CONFIG_I2C3_PIN_MUX 1 | 56 #define CONFIG_I2C3_PIN_MUX 1 |
| 50 | 57 |
| 51 #define CONFIG_SYS_MEMTEST_START 0x0000 | 58 #define CONFIG_SYS_MEMTEST_START 0x0000 |
| (...skipping 15 matching lines...) Expand all Loading... | |
| 67 * and undef or delete the CONFIG_ENV_IS_NOWHERE (if present). | 74 * and undef or delete the CONFIG_ENV_IS_NOWHERE (if present). |
| 68 * Note that you MUST change the ENV_OFFSET to be beyond the BCT/BL area! | 75 * Note that you MUST change the ENV_OFFSET to be beyond the BCT/BL area! |
| 69 */ | 76 */ |
| 70 #if 0 | 77 #if 0 |
| 71 #define CONFIG_ENV_IS_IN_SPI_FLASH | 78 #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 72 #define CONFIG_ENV_SECT_SIZE 0x1000 /* 4K sectors */ | 79 #define CONFIG_ENV_SECT_SIZE 0x1000 /* 4K sectors */ |
| 73 #define CONFIG_ENV_OFFSET 0x0 /* DANGER! for test, use offset != 0 */ | 80 #define CONFIG_ENV_OFFSET 0x0 /* DANGER! for test, use offset != 0 */ |
| 74 #endif | 81 #endif |
| 75 | 82 |
| 76 #endif //__configs_chromeos_tegra2_seaboard_recovery_h__ | 83 #endif //__configs_chromeos_tegra2_seaboard_recovery_h__ |
| OLD | NEW |
