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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 77 CRegister cr8 = { 8 }; | 77 CRegister cr8 = { 8 }; |
| 78 CRegister cr9 = { 9 }; | 78 CRegister cr9 = { 9 }; |
| 79 CRegister cr10 = { 10 }; | 79 CRegister cr10 = { 10 }; |
| 80 CRegister cr11 = { 11 }; | 80 CRegister cr11 = { 11 }; |
| 81 CRegister cr12 = { 12 }; | 81 CRegister cr12 = { 12 }; |
| 82 CRegister cr13 = { 13 }; | 82 CRegister cr13 = { 13 }; |
| 83 CRegister cr14 = { 14 }; | 83 CRegister cr14 = { 14 }; |
| 84 CRegister cr15 = { 15 }; | 84 CRegister cr15 = { 15 }; |
| 85 | 85 |
| 86 | 86 |
| 87 // In order to determine the pc store offset, we execute a small code sequence. | |
| 88 // See ARM Architecture Reference Manual section A-2.4.3 | |
| 89 // Note that 'str pc, [sp]' and 'stmia sp, {pc}' were using different offsets | |
| 90 // under the QEMU emulator (now fixed), so we are careful to test the actual | |
| 91 // instruction we are interested in (stmia). | |
| 92 int PcStoreOffset() { | |
| 93 #if !defined(__arm__) | |
| 94 // Building an ARM emulator based target. The emulator is wired for 8 byte | |
| 95 // pc offsets as is the default in the spec. | |
| 96 static int pc_store_offset = 8; | |
| 97 #elif defined(__arm__) && !defined(__thumb__) | |
| 98 // __arm__ may be defined in thumb mode. | |
| 99 static int pc_store_offset = -1; | |
| 100 asm volatile( | |
| 101 "sub sp, sp, #4 \n\t" | |
| 102 "sub r1, pc, #4 \n\t" | |
| 103 "stmia sp, {pc} \n\t" | |
| 104 "ldr r0, [sp] \n\t" | |
| 105 "add sp, sp, #4 \n\t" | |
| 106 "sub %0, r0, r1 \n\t" | |
| 107 : "=r" (pc_store_offset) : : "r0", "r1", "memory"); | |
| 108 #elif defined(__thumb__) | |
| 109 static int pc_store_offset = -1; | |
| 110 asm volatile( | |
| 111 "@ Enter ARM Mode \n\t" | |
| 112 "adr r2, 1f \n\t" | |
| 113 "bx r2 \n\t" | |
| 114 ".ALIGN 4 \n\t" | |
| 115 ".ARM \n" | |
| 116 "1: sub sp, sp, #4 \n\t" | |
| 117 "sub r1, pc, #4 \n\t" | |
| 118 "stmia sp, {pc} \n\t" | |
| 119 "ldr r0, [sp] \n\t" | |
| 120 "add sp, sp, #4 \n\t" | |
| 121 "sub %0, r0, r1 \n" | |
| 122 "@ Enter THUMB Mode\n\t" | |
| 123 "adr r2, 2f+1 \n\t" | |
| 124 "bx r2 \n\t" | |
| 125 ".THUMB \n" | |
| 126 "2: \n\t" | |
| 127 : "=r" (pc_store_offset) : : "r0", "r1", "r2", "memory"); | |
| 128 #else | |
| 129 #error unsupported architecture | |
| 130 #endif | |
| 131 ASSERT(pc_store_offset == 8 || pc_store_offset == 12); | |
| 132 return pc_store_offset; | |
| 133 } | |
| 134 | |
| 135 | |
| 136 // ----------------------------------------------------------------------------- | 87 // ----------------------------------------------------------------------------- |
| 137 // Implementation of RelocInfo | 88 // Implementation of RelocInfo |
| 138 | 89 |
| 139 const int RelocInfo::kApplyMask = 0; | 90 const int RelocInfo::kApplyMask = 0; |
| 140 | 91 |
| 141 | 92 |
| 142 void RelocInfo::PatchCode(byte* instructions, int instruction_count) { | 93 void RelocInfo::PatchCode(byte* instructions, int instruction_count) { |
| 143 // Patch the code at the current address with the supplied instructions. | 94 // Patch the code at the current address with the supplied instructions. |
| 144 UNIMPLEMENTED(); | 95 UNIMPLEMENTED(); |
| 145 } | 96 } |
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| 1511 bind(&after_pool); | 1462 bind(&after_pool); |
| 1512 } | 1463 } |
| 1513 | 1464 |
| 1514 // Since a constant pool was just emitted, move the check offset forward by | 1465 // Since a constant pool was just emitted, move the check offset forward by |
| 1515 // the standard interval. | 1466 // the standard interval. |
| 1516 next_buffer_check_ = pc_offset() + kCheckConstInterval; | 1467 next_buffer_check_ = pc_offset() + kCheckConstInterval; |
| 1517 } | 1468 } |
| 1518 | 1469 |
| 1519 | 1470 |
| 1520 } } // namespace v8::internal | 1471 } } // namespace v8::internal |
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Chromium Code Reviews
Issue 42610:
Fix and cleanup ARM port:... (Closed)
Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/