Allow forcing the use of a simulator from the build script...

src/globals.h

 // Copyright 2006-2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 76 matching lines @@
 #if (defined(V8_TARGET_ARCH_ARM) && \
     !(defined(V8_HOST_ARCH_IA32) || defined(V8_HOST_ARCH_ARM)))
 #error Target architecture arm is only supported on arm and ia32 host
 #endif
 #if (defined(V8_TARGET_ARCH_MIPS) && \
     !(defined(V8_HOST_ARCH_IA32) || defined(V8_HOST_ARCH_MIPS)))
 #error Target architecture mips is only supported on mips and ia32 host
 #endif
 
 // Determine whether we are running in a simulated environment.
+// Setting USE_SIMULATOR explicitly from the build script will force
+// the use of a simulated environment.
+#if !defined(USE_SIMULATOR)
 #if (defined(V8_TARGET_ARCH_ARM) && !defined(V8_HOST_ARCH_ARM))
 #define USE_SIMULATOR 1
 #endif
 #if (defined(V8_TARGET_ARCH_MIPS) && !defined(V8_HOST_ARCH_MIPS))
 #define USE_SIMULATOR 1
 #endif
+#endif
 
 // Define unaligned read for the target architectures supporting it.
 #if defined(V8_TARGET_ARCH_X64) || defined(V8_TARGET_ARCH_IA32)
 #define V8_TARGET_CAN_READ_UNALIGNED 1
 #elif V8_TARGET_ARCH_ARM
 // Some CPU-OS combinations allow unaligned access on ARM. We assume
 // that unaligned accesses are not allowed unless the build system
 // defines the CAN_USE_UNALIGNED_ACCESSES macro to be non-zero.
 #if CAN_USE_UNALIGNED_ACCESSES
 #define V8_TARGET_CAN_READ_UNALIGNED 1
@@ skipping 604 matching lines @@
                   CMOV = 15,   // x86
                   RDTSC = 4,   // x86
                   CPUID = 10,  // x86
                   VFP3 = 1,    // ARM
                   ARMv7 = 2,   // ARM
                   SAHF = 0};   // x86
 
 } }  // namespace v8::internal
 
 #endif  // V8_GLOBALS_H_