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Issue 4044003: Clean up definitions in simulator. ... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 1 month ago
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1 // Copyright 2006-2009 the V8 project authors. All rights reserved. 1 // Copyright 2006-2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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86 #endif 86 #endif
87 #if (defined(V8_TARGET_ARCH_ARM) && \ 87 #if (defined(V8_TARGET_ARCH_ARM) && \
88 !(defined(V8_HOST_ARCH_IA32) || defined(V8_HOST_ARCH_ARM))) 88 !(defined(V8_HOST_ARCH_IA32) || defined(V8_HOST_ARCH_ARM)))
89 #error Target architecture arm is only supported on arm and ia32 host 89 #error Target architecture arm is only supported on arm and ia32 host
90 #endif 90 #endif
91 #if (defined(V8_TARGET_ARCH_MIPS) && \ 91 #if (defined(V8_TARGET_ARCH_MIPS) && \
92 !(defined(V8_HOST_ARCH_IA32) || defined(V8_HOST_ARCH_MIPS))) 92 !(defined(V8_HOST_ARCH_IA32) || defined(V8_HOST_ARCH_MIPS)))
93 #error Target architecture mips is only supported on mips and ia32 host 93 #error Target architecture mips is only supported on mips and ia32 host
94 #endif 94 #endif
95 95
96 // Determine whether we are running in a simulated environment.
97 #if (defined(V8_TARGET_ARCH_ARM) && !defined(V8_HOST_ARCH_ARM))
98 #define USE_SIMULATOR 1
99 #endif
100 #if (defined(V8_TARGET_ARCH_MIPS) && !defined(V8_HOST_ARCH_MIPS))
101 #define USE_SIMULATOR 1
102 #endif
103
96 // Define unaligned read for the target architectures supporting it. 104 // Define unaligned read for the target architectures supporting it.
97 #if defined(V8_TARGET_ARCH_X64) || defined(V8_TARGET_ARCH_IA32) 105 #if defined(V8_TARGET_ARCH_X64) || defined(V8_TARGET_ARCH_IA32)
98 #define V8_TARGET_CAN_READ_UNALIGNED 1 106 #define V8_TARGET_CAN_READ_UNALIGNED 1
99 #elif V8_TARGET_ARCH_ARM 107 #elif V8_TARGET_ARCH_ARM
100 // Some CPU-OS combinations allow unaligned access on ARM. We assume 108 // Some CPU-OS combinations allow unaligned access on ARM. We assume
101 // that unaligned accesses are not allowed unless the build system 109 // that unaligned accesses are not allowed unless the build system
102 // defines the CAN_USE_UNALIGNED_ACCESSES macro to be non-zero. 110 // defines the CAN_USE_UNALIGNED_ACCESSES macro to be non-zero.
103 #if CAN_USE_UNALIGNED_ACCESSES 111 #if CAN_USE_UNALIGNED_ACCESSES
104 #define V8_TARGET_CAN_READ_UNALIGNED 1 112 #define V8_TARGET_CAN_READ_UNALIGNED 1
105 #endif 113 #endif
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709 CMOV = 15, // x86 717 CMOV = 15, // x86
710 RDTSC = 4, // x86 718 RDTSC = 4, // x86
711 CPUID = 10, // x86 719 CPUID = 10, // x86
712 VFP3 = 1, // ARM 720 VFP3 = 1, // ARM
713 ARMv7 = 2, // ARM 721 ARMv7 = 2, // ARM
714 SAHF = 0}; // x86 722 SAHF = 0}; // x86
715 723
716 } } // namespace v8::internal 724 } } // namespace v8::internal
717 725
718 #endif // V8_GLOBALS_H_ 726 #endif // V8_GLOBALS_H_
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