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Side by Side Diff: src/x64/disasm-x64.cc

Issue 390004: Fix warnings on Win64. (Closed)
Patch Set: Created 11 years, 1 month ago
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1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1062 } else if (opcode == 0x2C && group_1_prefix_ == 0xF3) { 1062 } else if (opcode == 0x2C && group_1_prefix_ == 0xF3) {
1063 // Instruction with prefix 0xF3. 1063 // Instruction with prefix 0xF3.
1064 1064
1065 // CVTTSS2SI: Convert scalar single-precision FP to dword integer. 1065 // CVTTSS2SI: Convert scalar single-precision FP to dword integer.
1066 // Assert that mod is not 3, so source is memory, not an XMM register. 1066 // Assert that mod is not 3, so source is memory, not an XMM register.
1067 ASSERT_NE(0xC0, *current & 0xC0); 1067 ASSERT_NE(0xC0, *current & 0xC0);
1068 current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current); 1068 current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current);
1069 } else { 1069 } else {
1070 UnimplementedInstruction(); 1070 UnimplementedInstruction();
1071 } 1071 }
1072 return current - data; 1072 return static_cast<int>(current - data);
1073 } 1073 }
1074 1074
1075 1075
1076 // Mnemonics for two-byte opcode instructions starting with 0x0F. 1076 // Mnemonics for two-byte opcode instructions starting with 0x0F.
1077 // The argument is the second byte of the two-byte opcode. 1077 // The argument is the second byte of the two-byte opcode.
1078 // Returns NULL if the instruction is not handled here. 1078 // Returns NULL if the instruction is not handled here.
1079 const char* DisassemblerX64::TwoByteMnemonic(byte opcode) { 1079 const char* DisassemblerX64::TwoByteMnemonic(byte opcode) {
1080 switch (opcode) { 1080 switch (opcode) {
1081 case 0x1F: 1081 case 0x1F:
1082 return "nop"; 1082 return "nop";
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1467 default: 1467 default:
1468 UnimplementedInstruction(); 1468 UnimplementedInstruction();
1469 data += 1; 1469 data += 1;
1470 } 1470 }
1471 } // !processed 1471 } // !processed
1472 1472
1473 if (tmp_buffer_pos_ < sizeof tmp_buffer_) { 1473 if (tmp_buffer_pos_ < sizeof tmp_buffer_) {
1474 tmp_buffer_[tmp_buffer_pos_] = '\0'; 1474 tmp_buffer_[tmp_buffer_pos_] = '\0';
1475 } 1475 }
1476 1476
1477 int instr_len = data - instr; 1477 int instr_len = static_cast<int>(data - instr);
1478 ASSERT(instr_len > 0); // Ensure progress. 1478 ASSERT(instr_len > 0); // Ensure progress.
1479 1479
1480 int outp = 0; 1480 int outp = 0;
1481 // Instruction bytes. 1481 // Instruction bytes.
1482 for (byte* bp = instr; bp < data; bp++) { 1482 for (byte* bp = instr; bp < data; bp++) {
1483 outp += v8::internal::OS::SNPrintF(out_buffer + outp, "%02x", *bp); 1483 outp += v8::internal::OS::SNPrintF(out_buffer + outp, "%02x", *bp);
1484 } 1484 }
1485 for (int i = 6 - instr_len; i >= 0; i--) { 1485 for (int i = 6 - instr_len; i >= 0; i--) {
1486 outp += v8::internal::OS::SNPrintF(out_buffer + outp, " "); 1486 outp += v8::internal::OS::SNPrintF(out_buffer + outp, " ");
1487 } 1487 }
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1579 v8::internal::EmbeddedVector<char, 128> buffer; 1579 v8::internal::EmbeddedVector<char, 128> buffer;
1580 buffer[0] = '\0'; 1580 buffer[0] = '\0';
1581 byte* prev_pc = pc; 1581 byte* prev_pc = pc;
1582 pc += d.InstructionDecode(buffer, pc); 1582 pc += d.InstructionDecode(buffer, pc);
1583 fprintf(f, "%p", prev_pc); 1583 fprintf(f, "%p", prev_pc);
1584 fprintf(f, " "); 1584 fprintf(f, " ");
1585 1585
1586 for (byte* bp = prev_pc; bp < pc; bp++) { 1586 for (byte* bp = prev_pc; bp < pc; bp++) {
1587 fprintf(f, "%02x", *bp); 1587 fprintf(f, "%02x", *bp);
1588 } 1588 }
1589 for (int i = 6 - (pc - prev_pc); i >= 0; i--) { 1589 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
1590 fprintf(f, " "); 1590 fprintf(f, " ");
1591 } 1591 }
1592 fprintf(f, " %s\n", buffer.start()); 1592 fprintf(f, " %s\n", buffer.start());
1593 } 1593 }
1594 } 1594 }
1595 1595
1596 } // namespace disasm 1596 } // namespace disasm
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