Fix some style issues in the ARM code....

src/arm/codegen-arm.cc

 // Copyright 2006-2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 4581 matching lines @@
       }
     }
     __ mov(pc, Operand(lr));  // Return.
   }
   // No fall through here.
 
   __ bind(&not_identical);
 }
 
 
-static void IntegerToDoubleConversionWithVFP3(MacroAssembler* masm,
-                                              Register inReg,
-                                              Register outHighReg,
-                                              Register outLowReg) {
-  // ARMv7 VFP3 instructions to implement integer to double conversion.
-  // This VFP3 implementation is known to work
-  // on ARMv7-VFP3 Snapdragon processor.
-
-  __ mov(r7, Operand(inReg, ASR, kSmiTagSize));
-  __ fmsr(s15, r7);
-  __ fsitod(d7, s15);
-  __ fmrrd(outLowReg, outHighReg, d7);
-}
-
-
 // See comment at call site.
 static void EmitSmiNonsmiComparison(MacroAssembler* masm,
                                     Label* rhs_not_nan,
                                     Label* slow,
                                     bool strict) {
   Label lhs_is_smi;
   __ tst(r0, Operand(kSmiTagMask));
   __ b(eq, &lhs_is_smi);
 
   // Rhs is a Smi.  Check whether the non-smi is a heap number.
   __ CompareObjectType(r0, r4, r4, HEAP_NUMBER_TYPE);
   if (strict) {
     // If lhs was not a number and rhs was a Smi then strict equality cannot
     // succeed.  Return non-equal (r0 is already not zero)
     __ mov(pc, Operand(lr), LeaveCC, ne);  // Return.
   } else {
     // Smi compared non-strictly with a non-Smi non-heap-number.  Call
     // the runtime.
     __ b(ne, slow);
   }
 
   // Rhs is a smi, lhs is a number.
   __ push(lr);
 
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
-    IntegerToDoubleConversionWithVFP3(masm, r1, r3, r2);
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
+    __ IntegerToDoubleConversionWithVFP3(r1, r3, r2);
   } else {
     __ mov(r7, Operand(r1));
     ConvertToDoubleStub stub1(r3, r2, r7, r6);
     __ Call(stub1.GetCode(), RelocInfo::CODE_TARGET);
   }
 
 
   // r3 and r2 are rhs as double.
   __ ldr(r1, FieldMemOperand(r0, HeapNumber::kValueOffset + kPointerSize));
   __ ldr(r0, FieldMemOperand(r0, HeapNumber::kValueOffset));
@@ skipping 16 matching lines @@
     __ b(ne, slow);
   }
 
   // Lhs is a smi, rhs is a number.
   // r0 is Smi and r1 is heap number.
   __ push(lr);
   __ ldr(r2, FieldMemOperand(r1, HeapNumber::kValueOffset));
   __ ldr(r3, FieldMemOperand(r1, HeapNumber::kValueOffset + kPointerSize));
 
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
-    IntegerToDoubleConversionWithVFP3(masm, r0, r1, r0);
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
+    __ IntegerToDoubleConversionWithVFP3(r0, r1, r0);
   } else {
     __ mov(r7, Operand(r0));
     ConvertToDoubleStub stub2(r1, r0, r7, r6);
     __ Call(stub2.GetCode(), RelocInfo::CODE_TARGET);
   }
 
   __ pop(lr);
   // Fall through to both_loaded_as_doubles.
 }
 
@@ skipping 189 matching lines @@
 
   __ bind(&both_loaded_as_doubles);
   // r0, r1, r2, r3 are the double representations of the left hand side
   // and the right hand side.
 
   // Checks for NaN in the doubles we have loaded.  Can return the answer or
   // fall through if neither is a NaN.  Also binds rhs_not_nan.
   EmitNanCheck(masm, &rhs_not_nan, cc_);
 
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
     // ARMv7 VFP3 instructions to implement double precision comparison.
-    // This VFP3 implementation is known to work on
-    // ARMv7-VFP3 Snapdragon processor.
-
     __ fmdrr(d6, r0, r1);
     __ fmdrr(d7, r2, r3);
 
     __ fcmp(d6, d7);
     __ vmrs(pc);
     __ mov(r0, Operand(0), LeaveCC, eq);
     __ mov(r0, Operand(1), LeaveCC, lt);
     __ mvn(r0, Operand(0), LeaveCC, gt);
     __ mov(pc, Operand(lr));
   } else {
@@ skipping 95 matching lines @@
                                     Token::Value operation,
                                     OverwriteMode mode) {
   Label slow, slow_pop_2_first, do_the_call;
   Label r0_is_smi, r1_is_smi, finished_loading_r0, finished_loading_r1;
   // Smi-smi case (overflow).
   // Since both are Smis there is no heap number to overwrite, so allocate.
   // The new heap number is in r5.  r6 and r7 are scratch.
   AllocateHeapNumber(masm, &slow, r5, r6, r7);
 
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
-    IntegerToDoubleConversionWithVFP3(masm, r0, r3, r2);
-    IntegerToDoubleConversionWithVFP3(masm, r1, r1, r0);
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
+    __ IntegerToDoubleConversionWithVFP3(r0, r3, r2);
+    __ IntegerToDoubleConversionWithVFP3(r1, r1, r0);
   } else {
     // Write Smi from r0 to r3 and r2 in double format.  r6 is scratch.
     __ mov(r7, Operand(r0));
     ConvertToDoubleStub stub1(r3, r2, r7, r6);
     __ push(lr);
     __ Call(stub1.GetCode(), RelocInfo::CODE_TARGET);
     // Write Smi from r1 to r1 and r0 in double format.  r6 is scratch.
     __ mov(r7, Operand(r1));
     ConvertToDoubleStub stub2(r1, r0, r7, r6);
     __ Call(stub2.GetCode(), RelocInfo::CODE_TARGET);
@@ skipping 31 matching lines @@
   __ ldr(r3, FieldMemOperand(r0, HeapNumber::kValueOffset + 4));
   __ jmp(&finished_loading_r0);
   __ bind(&r0_is_smi);
   if (mode == OVERWRITE_RIGHT) {
     // We can't overwrite a Smi so get address of new heap number into r5.
     AllocateHeapNumber(masm, &slow, r5, r6, r7);
   }
 
 
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
-    IntegerToDoubleConversionWithVFP3(masm, r0, r3, r2);
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
+    __ IntegerToDoubleConversionWithVFP3(r0, r3, r2);
   } else {
     // Write Smi from r0 to r3 and r2 in double format.
     __ mov(r7, Operand(r0));
     ConvertToDoubleStub stub3(r3, r2, r7, r6);
     __ push(lr);
     __ Call(stub3.GetCode(), RelocInfo::CODE_TARGET);
     __ pop(lr);
   }
 
   __ bind(&finished_loading_r0);
@@ skipping 10 matching lines @@
   __ ldr(r0, FieldMemOperand(r1, HeapNumber::kValueOffset));
   __ ldr(r1, FieldMemOperand(r1, HeapNumber::kValueOffset + 4));
   __ jmp(&finished_loading_r1);
   __ bind(&r1_is_smi);
   if (mode == OVERWRITE_LEFT) {
     // We can't overwrite a Smi so get address of new heap number into r5.
     AllocateHeapNumber(masm, &slow, r5, r6, r7);
   }
 
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
-    IntegerToDoubleConversionWithVFP3(masm, r1, r1, r0);
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
+    __ IntegerToDoubleConversionWithVFP3(r1, r1, r0);
   } else {
     // Write Smi from r1 to r1 and r0 in double format.
     __ mov(r7, Operand(r1));
     ConvertToDoubleStub stub4(r1, r0, r7, r6);
     __ push(lr);
     __ Call(stub4.GetCode(), RelocInfo::CODE_TARGET);
     __ pop(lr);
   }
 
   __ bind(&finished_loading_r1);
 
   __ bind(&do_the_call);
   // r0: Left value (least significant part of mantissa).
   // r1: Left value (sign, exponent, top of mantissa).
   // r2: Right value (least significant part of mantissa).
   // r3: Right value (sign, exponent, top of mantissa).
   // r5: Address of heap number for result.
 
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3) &&
       ((Token::MUL == operation) ||
        (Token::DIV == operation) ||
        (Token::ADD == operation) ||
        (Token::SUB == operation))) {
-     // ARMv7 VFP3 instructions to implement
-     // double precision, add, subtract, multiply, divide.
-     // This VFP3 implementation is known to work on
-     // ARMv7-VFP3 Snapdragon processor
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
+    // ARMv7 VFP3 instructions to implement
+    // double precision, add, subtract, multiply, divide.
+    __ fmdrr(d6, r0, r1);
+    __ fmdrr(d7, r2, r3);
 
-     __ fmdrr(d6, r0, r1);
-     __ fmdrr(d7, r2, r3);
+    if      (Token::MUL == operation) __ fmuld(d5, d6, d7);

[Mads Ager (chromium), 2009/11/12 13:25:24]

Please remove extra spacing.

[Erik Corry, 2009/11/12 13:42:37]

I also added {}

+    else if (Token::DIV == operation) __ fdivd(d5, d6, d7);
+    else if (Token::ADD == operation) __ faddd(d5, d6, d7);
+    else if (Token::SUB == operation) __ fsubd(d5, d6, d7);
 
-     if      (Token::MUL == operation) __ fmuld(d5, d6, d7);
-     else if (Token::DIV == operation) __ fdivd(d5, d6, d7);
-     else if (Token::ADD == operation) __ faddd(d5, d6, d7);
-     else if (Token::SUB == operation) __ fsubd(d5, d6, d7);
+    __ fmrrd(r0, r1, d5);
 
-     __ fmrrd(r0, r1, d5);
-
-     __ str(r0, FieldMemOperand(r5, HeapNumber::kValueOffset));
-     __ str(r1, FieldMemOperand(r5, HeapNumber::kValueOffset + 4));
-     __ mov(r0, Operand(r5));
-     __ mov(pc, lr);
-     return;
+    __ str(r0, FieldMemOperand(r5, HeapNumber::kValueOffset));
+    __ str(r1, FieldMemOperand(r5, HeapNumber::kValueOffset + 4));
+    __ mov(r0, Operand(r5));
+    __ mov(pc, lr);
+    return;
   }
   __ push(lr);   // For later.
   __ push(r5);   // Address of heap number that is answer.
   __ AlignStack(0);
   // Call C routine that may not cause GC or other trouble.
   __ mov(r5, Operand(ExternalReference::double_fp_operation(operation)));
   __ Call(r5);
   __ pop(r4);  // Address of heap number.
   __ cmp(r4, Operand(Smi::FromInt(0)));
   __ pop(r4, eq);  // Conditional pop instruction to get rid of alignment push.
@@ skipping 58 matching lines @@
   __ b(lt, &done);
   if (!CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
     // We have a shifted exponent between 0 and 30 in scratch2.
     __ mov(dest, Operand(scratch2, LSR, HeapNumber::kExponentShift));
     // We now have the exponent in dest.  Subtract from 30 to get
     // how much to shift down.
     __ rsb(dest, dest, Operand(30));
   }
   __ bind(&right_exponent);
   if (CpuFeatures::IsSupported(CpuFeatures::VFP3)) {
+    CpuFeatures::Scope scope(CpuFeatures::VFP3);
     // ARMv7 VFP3 instructions implementing double precision to integer
     // conversion using round to zero.
-    // This VFP3 implementation is known to work on
-    // ARMv7-VFP3 Snapdragon processor.
     __ ldr(scratch2, FieldMemOperand(source, HeapNumber::kMantissaOffset));
     __ fmdrr(d7, scratch2, scratch);
     __ ftosid(s15, d7);
     __ fmrs(dest, s15);
   } else {
     // Get the top bits of the mantissa.
     __ and_(scratch2, scratch, Operand(HeapNumber::kMantissaMask));
     // Put back the implicit 1.
     __ orr(scratch2, scratch2, Operand(1 << HeapNumber::kExponentShift));
     // Shift up the mantissa bits to take up the space the exponent used to
     // take. We just orred in the implicit bit so that took care of one and
     // we want to leave the sign bit 0 so we subtract 2 bits from the shift
-    //  distance.
+    // distance.
     const int shift_distance = HeapNumber::kNonMantissaBitsInTopWord - 2;
     __ mov(scratch2, Operand(scratch2, LSL, shift_distance));
     // Put sign in zero flag.
     __ tst(scratch, Operand(HeapNumber::kSignMask));
     // Get the second half of the double. For some exponents we don't
     // actually need this because the bits get shifted out again, but
     // it's probably slower to test than just to do it.
     __ ldr(scratch, FieldMemOperand(source, HeapNumber::kMantissaOffset));
     // Shift down 22 bits to get the last 10 bits.
     __ orr(scratch, scratch2, Operand(scratch, LSR, 32 - shift_distance));
@@ skipping 1102 matching lines @@
 int CompareStub::MinorKey() {
   // Encode the two parameters in a unique 16 bit value.
   ASSERT(static_cast<unsigned>(cc_) >> 28 < (1 << 15));
   return (static_cast<unsigned>(cc_) >> 27) | (strict_ ? 1 : 0);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal