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1 //===- X86InstrCompiler.td - Compiler Pseudos and Patterns -*- tablegen -*-===// | 1 //===- X86InstrCompiler.td - Compiler Pseudos and Patterns -*- tablegen -*-===// |
2 // | 2 // |
3 // The LLVM Compiler Infrastructure | 3 // The LLVM Compiler Infrastructure |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file describes the various pseudo instructions used by the compiler, | 10 // This file describes the various pseudo instructions used by the compiler, |
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71 def VASTART_SAVE_XMM_REGS : I<0, Pseudo, | 71 def VASTART_SAVE_XMM_REGS : I<0, Pseudo, |
72 (outs), | 72 (outs), |
73 (ins GR8:$al, | 73 (ins GR8:$al, |
74 i64imm:$regsavefi, i64imm:$offset, | 74 i64imm:$regsavefi, i64imm:$offset, |
75 variable_ops), | 75 variable_ops), |
76 "#VASTART_SAVE_XMM_REGS $al, $regsavefi, $offset", | 76 "#VASTART_SAVE_XMM_REGS $al, $regsavefi, $offset", |
77 [(X86vastart_save_xmm_regs GR8:$al, | 77 [(X86vastart_save_xmm_regs GR8:$al, |
78 imm:$regsavefi, | 78 imm:$regsavefi, |
79 imm:$offset)]>; | 79 imm:$offset)]>; |
80 | 80 |
| 81 // The VAARG_64 pseudo-instruction takes the address of the va_list, |
| 82 // and places the address of the next argument into a register. |
| 83 let Defs = [EFLAGS] in |
| 84 def VAARG_64 : I<0, Pseudo, |
| 85 (outs GR64:$dst), |
| 86 (ins i8mem:$ap, i32imm:$size, i8imm:$mode, i32imm:$align), |
| 87 "#VAARG_64 $dst, $ap, $size, $mode, $align", |
| 88 [(set GR64:$dst, |
| 89 (X86vaarg64 addr:$ap, imm:$size, imm:$mode, imm:$align)), |
| 90 (implicit EFLAGS)]>; |
| 91 |
81 // Dynamic stack allocation yields _alloca call for Cygwin/Mingw targets. Calls | 92 // Dynamic stack allocation yields _alloca call for Cygwin/Mingw targets. Calls |
82 // to _alloca is needed to probe the stack when allocating more than 4k bytes in | 93 // to _alloca is needed to probe the stack when allocating more than 4k bytes in |
83 // one go. Touching the stack at 4K increments is necessary to ensure that the | 94 // one go. Touching the stack at 4K increments is necessary to ensure that the |
84 // guard pages used by the OS virtual memory manager are allocated in correct | 95 // guard pages used by the OS virtual memory manager are allocated in correct |
85 // sequence. | 96 // sequence. |
86 // The main point of having separate instruction are extra unmodelled effects | 97 // The main point of having separate instruction are extra unmodelled effects |
87 // (compared to ordinary calls) like stack pointer change. | 98 // (compared to ordinary calls) like stack pointer change. |
88 | 99 |
89 let Defs = [EAX, ESP, EFLAGS], Uses = [ESP] in | 100 let Defs = [EAX, ESP, EFLAGS], Uses = [ESP] in |
90 def MINGW_ALLOCA : I<0, Pseudo, (outs), (ins), | 101 def MINGW_ALLOCA : I<0, Pseudo, (outs), (ins), |
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1609 (AND32ri GR32:$src1, imm:$src2)>; | 1620 (AND32ri GR32:$src1, imm:$src2)>; |
1610 def : Pat<(and GR16:$src1, i16immSExt8:$src2), | 1621 def : Pat<(and GR16:$src1, i16immSExt8:$src2), |
1611 (AND16ri8 GR16:$src1, i16immSExt8:$src2)>; | 1622 (AND16ri8 GR16:$src1, i16immSExt8:$src2)>; |
1612 def : Pat<(and GR32:$src1, i32immSExt8:$src2), | 1623 def : Pat<(and GR32:$src1, i32immSExt8:$src2), |
1613 (AND32ri8 GR32:$src1, i32immSExt8:$src2)>; | 1624 (AND32ri8 GR32:$src1, i32immSExt8:$src2)>; |
1614 def : Pat<(and GR64:$src1, i64immSExt8:$src2), | 1625 def : Pat<(and GR64:$src1, i64immSExt8:$src2), |
1615 (AND64ri8 GR64:$src1, i64immSExt8:$src2)>; | 1626 (AND64ri8 GR64:$src1, i64immSExt8:$src2)>; |
1616 def : Pat<(and GR64:$src1, i64immSExt32:$src2), | 1627 def : Pat<(and GR64:$src1, i64immSExt32:$src2), |
1617 (AND64ri32 GR64:$src1, i64immSExt32:$src2)>; | 1628 (AND64ri32 GR64:$src1, i64immSExt32:$src2)>; |
1618 | 1629 |
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