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Side by Side Diff: chromeos/drivers/ath6kl/include/common/AR6002/hw4.0/hw/mac_dma_reg.h

Issue 3579004: ath6kl: Bringing in the upstream version (Closed) Base URL: http://git.chromium.org/git/kernel.git
Patch Set: Created 10 years, 2 months ago
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1 // 1 // ------------------------------------------------------------------
2 // Copyright (c) 2002-2009 Atheros Communications Inc. 2 // Copyright (c) 2002-2010 Atheros Communications Inc.
3 // All rights reserved. 3 // All rights reserved.
4 // 4 //
5 // This program is free software; you can redistribute it and/or modify
6 // it under the terms of the GNU General Public License version 2 as
7 // published by the Free Software Foundation;
8 // 5 //
9 // Software distributed under the License is distributed on an "AS 6 // Permission to use, copy, modify, and/or distribute this software for any
10 // IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or 7 // purpose with or without fee is hereby granted, provided that the above
11 // implied. See the License for the specific language governing 8 // copyright notice and this permission notice appear in all copies.
12 // rights and limitations under the License. 9 //
10 // THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 // WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 // MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 // ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 // WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 // ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 // OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
13 // 17 //
14 // 18 //
15 // 19 // ------------------------------------------------------------------
20 //===================================================================
21 // Author(s): ="Atheros"
22 //===================================================================
23
16 24
17 /*****************************************************************************/ 25 /*****************************************************************************/
18 /* AR6003 WLAN MAC DMA register definitions */ 26 /* AR6003 WLAN MAC DMA register definitions */
19 /*****************************************************************************/ 27 /*****************************************************************************/
20 28
21 #ifndef _AR6000_DMAREG_H_ 29 #ifndef _AR6000_DMAREG_H_
22 #define _AR6000_DMAREG_H_ 30 #define _AR6000_DMAREG_H_
23 31
24 /* 32 /*
25 * Definitions for the Atheros AR6003 chipset. 33 * Definitions for the Atheros AR6003 chipset.
(...skipping 562 matching lines...) Expand 10 before | Expand all | Expand 10 after
588 #define MAC_DMA_D_MISC_BLOWN_IFS_POLICY_MASK 0x00800000 /* Blown IFS handling policy */ 596 #define MAC_DMA_D_MISC_BLOWN_IFS_POLICY_MASK 0x00800000 /* Blown IFS handling policy */
589 597
590 #define MAC_DMA_D_SEQNUM_ADDRESS 0x00001140 /* MAC Frame sequenc e number */ 598 #define MAC_DMA_D_SEQNUM_ADDRESS 0x00001140 /* MAC Frame sequenc e number */
591 599
592 600
593 601
594 #define MAC_DMA_D_FPCTL_ADDRESS 0x00001230 /* DCU frame pr efetch settings */ 602 #define MAC_DMA_D_FPCTL_ADDRESS 0x00001230 /* DCU frame pr efetch settings */
595 #define MAC_DMA_D_TXPSE_ADDRESS 0x00001270 /* DCU transmit pause control/status */ 603 #define MAC_DMA_D_TXPSE_ADDRESS 0x00001270 /* DCU transmit pause control/status */
596 604
597 #endif /* _AR6000_DMMAEG_H_ */ 605 #endif /* _AR6000_DMMAEG_H_ */
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