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| 1 /* |
| 2 * (C) Copyright 2010 |
| 3 * NVIDIA Corporation <www.nvidia.com> |
| 4 * |
| 5 * See file CREDITS for list of people who contributed to this |
| 6 * project. |
| 7 * |
| 8 * This program is free software; you can redistribute it and/or |
| 9 * modify it under the terms of the GNU General Public License as |
| 10 * published by the Free Software Foundation; either version 2 of |
| 11 * the License, or (at your option) any later version. |
| 12 * |
| 13 * This program is distributed in the hope that it will be useful, |
| 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 * GNU General Public License for more details. |
| 17 * |
| 18 * You should have received a copy of the GNU General Public License |
| 19 * along with this program; if not, write to the Free Software |
| 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 * MA 02111-1307 USA |
| 22 */ |
| 23 |
| 24 #include <common.h> |
| 25 |
| 26 #define TEGRA_MISC_BASE 0x70000000 |
| 27 #define TEGRA_CLK_BASE 0x60006000 |
| 28 |
| 29 #define KBC_CLK_REG 0x328 |
| 30 |
| 31 #define readl(addr) (*(volatile unsigned int *)(addr)) |
| 32 #define writel(b, addr) ((*(volatile unsigned int *) (addr)) = (b)) |
| 33 #define misc_readl(addr) readl(TEGRA_MISC_BASE + addr) |
| 34 #define misc_writel(b, addr) writel(b, TEGRA_MISC_BASE + addr) |
| 35 #define clk_writel(b, addr) writel(b, TEGRA_CLK_BASE + addr) |
| 36 |
| 37 static void pinmux_set_func(u32 mux_reg, u32 mux_val, u32 mux_bit) |
| 38 { |
| 39 u32 reg; |
| 40 |
| 41 reg = misc_readl(mux_reg); |
| 42 reg &= ~(0x3 << mux_bit); |
| 43 reg |= mux_val << mux_bit; |
| 44 misc_writel(reg, mux_reg); |
| 45 } |
| 46 |
| 47 static void pinmux_set_tri(u32 tri_reg, u32 tri_val, u32 tri_bit) |
| 48 { |
| 49 u32 reg; |
| 50 |
| 51 reg = misc_readl(tri_reg); |
| 52 reg &= ~(0x1 << tri_bit); |
| 53 if (tri_val) |
| 54 reg |= 1 << tri_bit; |
| 55 misc_writel(reg, tri_reg); |
| 56 } |
| 57 |
| 58 static void pinmux_set_pupd(u32 pupd_reg, u32 pupd_val, u32 pupd_bit) |
| 59 { |
| 60 u32 reg; |
| 61 |
| 62 reg = misc_readl(pupd_reg); |
| 63 reg &= ~(0x3 << pupd_bit); |
| 64 reg |= pupd_val << pupd_bit; |
| 65 misc_writel(reg, pupd_reg); |
| 66 } |
| 67 |
| 68 void config_kbc_pinmux(void) |
| 69 { |
| 70 pinmux_set_tri(0x14, 0, 22); |
| 71 pinmux_set_func(0x88, 0, 10); |
| 72 pinmux_set_pupd(0xA4, 2, 8); |
| 73 |
| 74 pinmux_set_tri(0x14, 0, 21); |
| 75 pinmux_set_func(0x88, 0, 12); |
| 76 pinmux_set_pupd(0xA4, 2, 10); |
| 77 |
| 78 pinmux_set_tri(0x18, 0, 26); |
| 79 pinmux_set_func(0x88, 0, 14); |
| 80 pinmux_set_pupd(0xA4, 2, 12); |
| 81 |
| 82 pinmux_set_tri(0x20, 0, 10); |
| 83 pinmux_set_func(0x98, 0, 26); |
| 84 pinmux_set_pupd(0xA4, 2, 14); |
| 85 |
| 86 pinmux_set_tri(0x14, 0, 26); |
| 87 pinmux_set_func(0x80, 0, 28); |
| 88 pinmux_set_pupd(0xB0, 2, 2); |
| 89 |
| 90 pinmux_set_tri(0x14, 0, 27); |
| 91 pinmux_set_func(0x80, 0, 26); |
| 92 pinmux_set_pupd(0xB0, 2, 0); |
| 93 |
| 94 } |
| 95 |
| 96 void config_kbc_clock(void) |
| 97 { |
| 98 clk_writel(1 << 4, KBC_CLK_REG); |
| 99 } |
| 100 |
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