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1 // Copyright 2009 the V8 project authors. All rights reserved. | 1 // Copyright 2009 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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68 # define CAN_USE_ARMV5_INSTRUCTIONS 1 | 68 # define CAN_USE_ARMV5_INSTRUCTIONS 1 |
69 # define CAN_USE_THUMB_INSTRUCTIONS 1 | 69 # define CAN_USE_THUMB_INSTRUCTIONS 1 |
70 #endif | 70 #endif |
71 | 71 |
72 namespace assembler { | 72 namespace assembler { |
73 namespace arm { | 73 namespace arm { |
74 | 74 |
75 // Number of registers in normal ARM mode. | 75 // Number of registers in normal ARM mode. |
76 static const int kNumRegisters = 16; | 76 static const int kNumRegisters = 16; |
77 | 77 |
| 78 // VFP support. |
| 79 static const int kNumVFPRegisters = 48; |
| 80 |
78 // PC is register 15. | 81 // PC is register 15. |
79 static const int kPCRegister = 15; | 82 static const int kPCRegister = 15; |
80 static const int kNoRegister = -1; | 83 static const int kNoRegister = -1; |
81 | 84 |
82 // Defines constants and accessor classes to assemble, disassemble and | 85 // Defines constants and accessor classes to assemble, disassemble and |
83 // simulate ARM instructions. | 86 // simulate ARM instructions. |
84 // | 87 // |
85 // Section references in the code refer to the "ARM Architecture Reference | 88 // Section references in the code refer to the "ARM Architecture Reference |
86 // Manual" from July 2005 (available at http://www.arm.com/miscPDFs/14128.pdf) | 89 // Manual" from July 2005 (available at http://www.arm.com/miscPDFs/14128.pdf) |
87 // | 90 // |
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224 // The naming of these accessor corresponds to figure A3-1. | 227 // The naming of these accessor corresponds to figure A3-1. |
225 // Generally applicable fields | 228 // Generally applicable fields |
226 inline Condition ConditionField() const { | 229 inline Condition ConditionField() const { |
227 return static_cast<Condition>(Bits(31, 28)); | 230 return static_cast<Condition>(Bits(31, 28)); |
228 } | 231 } |
229 inline int TypeField() const { return Bits(27, 25); } | 232 inline int TypeField() const { return Bits(27, 25); } |
230 | 233 |
231 inline int RnField() const { return Bits(19, 16); } | 234 inline int RnField() const { return Bits(19, 16); } |
232 inline int RdField() const { return Bits(15, 12); } | 235 inline int RdField() const { return Bits(15, 12); } |
233 | 236 |
| 237 // Support for VFP. |
| 238 // Vn(19-16) | Vd(15-12) | Vm(3-0) |
| 239 inline int VnField() const { return Bits(19, 16); } |
| 240 inline int VmField() const { return Bits(3, 0); } |
| 241 inline int VdField() const { return Bits(15, 12); } |
| 242 inline int NField() const { return Bit(7); } |
| 243 inline int MField() const { return Bit(5); } |
| 244 inline int DField() const { return Bit(22); } |
| 245 inline int RtField() const { return Bits(15, 12); } |
| 246 |
234 // Fields used in Data processing instructions | 247 // Fields used in Data processing instructions |
235 inline Opcode OpcodeField() const { | 248 inline Opcode OpcodeField() const { |
236 return static_cast<Opcode>(Bits(24, 21)); | 249 return static_cast<Opcode>(Bits(24, 21)); |
237 } | 250 } |
238 inline int SField() const { return Bit(20); } | 251 inline int SField() const { return Bit(20); } |
239 // with register | 252 // with register |
240 inline int RmField() const { return Bits(3, 0); } | 253 inline int RmField() const { return Bits(3, 0); } |
241 inline Shift ShiftField() const { return static_cast<Shift>(Bits(6, 5)); } | 254 inline Shift ShiftField() const { return static_cast<Shift>(Bits(6, 5)); } |
242 inline int RegShiftField() const { return Bit(4); } | 255 inline int RegShiftField() const { return Bit(4); } |
243 inline int RsField() const { return Bits(11, 8); } | 256 inline int RsField() const { return Bits(11, 8); } |
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308 struct RegisterAlias { | 321 struct RegisterAlias { |
309 int reg; | 322 int reg; |
310 const char *name; | 323 const char *name; |
311 }; | 324 }; |
312 | 325 |
313 private: | 326 private: |
314 static const char* names_[kNumRegisters]; | 327 static const char* names_[kNumRegisters]; |
315 static const RegisterAlias aliases_[]; | 328 static const RegisterAlias aliases_[]; |
316 }; | 329 }; |
317 | 330 |
| 331 // Helper functions for converting between VFP register numbers and names. |
| 332 class VFPRegisters { |
| 333 public: |
| 334 // Return the name of the register. |
| 335 static const char* Name(int reg); |
| 336 |
| 337 private: |
| 338 static const char* names_[kNumVFPRegisters]; |
| 339 }; |
318 | 340 |
319 | 341 |
320 } } // namespace assembler::arm | 342 } } // namespace assembler::arm |
321 | 343 |
322 #endif // V8_ARM_CONSTANTS_ARM_H_ | 344 #endif // V8_ARM_CONSTANTS_ARM_H_ |
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