Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(956)

Unified Diff: src/x64/disasm-x64.cc

Issue 3471011: Implemented missing instructions in ia32 and x64 disassembler.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « src/ia32/disasm-ia32.cc ('k') | test/cctest/test-disasm-ia32.cc » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/x64/disasm-x64.cc
===================================================================
--- src/x64/disasm-x64.cc (revision 5515)
+++ src/x64/disasm-x64.cc (working copy)
@@ -891,6 +891,10 @@
case 0xD9:
switch (modrm_byte & 0xF8) {
+ case 0xC0:
+ mnem = "fld";
+ has_register = true;
+ break;
case 0xC8:
mnem = "fxch";
has_register = true;
@@ -901,6 +905,7 @@
case 0xE1: mnem = "fabs"; break;
case 0xE4: mnem = "ftst"; break;
case 0xE8: mnem = "fld1"; break;
+ case 0xEB: mnem = "fldpi"; break;
case 0xEE: mnem = "fldz"; break;
case 0xF5: mnem = "fprem1"; break;
case 0xF7: mnem = "fincstp"; break;
@@ -1059,6 +1064,21 @@
get_modrm(*current, &mod, &regop, &rm);
AppendToBuffer("%sd %s,", mnemonic, NameOfXMMRegister(regop));
current += PrintRightOperand(current);
+ } else if (opcode == 0x2C) {
+ // CVTTSD2SI:
+ // Convert with truncation scalar double-precision FP to integer.
+ int mod, regop, rm;
+ get_modrm(*current, &mod, &regop, &rm);
+ AppendToBuffer("cvttsd2si%c %s,",
+ operand_size_code(), NameOfCPURegister(regop));
+ current += PrintRightXMMOperand(current);
+ } else if (opcode == 0x2D) {
+ // CVTSD2SI: Convert scalar double-precision FP to integer.
+ int mod, regop, rm;
+ get_modrm(*current, &mod, &regop, &rm);
+ AppendToBuffer("cvtsd2si%c %s,",
+ operand_size_code(), NameOfCPURegister(regop));
+ current += PrintRightXMMOperand(current);
} else if ((opcode & 0xF8) == 0x58 || opcode == 0x51) {
// XMM arithmetic. Mnemonic was retrieved at the start of this function.
int mod, regop, rm;
@@ -1089,11 +1109,14 @@
AppendToBuffer("%ss %s,", mnemonic, NameOfXMMRegister(regop));
current += PrintRightOperand(current);
} else if (opcode == 0x2C) {
- // CVTTSS2SI: Convert scalar single-precision FP to dword integer.
+ // CVTTSS2SI:
+ // Convert with truncation scalar single-precision FP to dword integer.
// Assert that mod is not 3, so source is memory, not an XMM register.
ASSERT_NE(0xC0, *current & 0xC0);
current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current);
Lasse Reichstein 2010/09/24 12:19:16 Could this function be used for cvt[t]sd2si above?
Vladislav Kaznacheev 2010/09/24 12:55:05 This was the first thing I tried. PrintOperand wou
} else if (opcode == 0x5A) {
+ // CVTSS2SD:
+ // Convert scalar single-precision FP to scalar double-precision FP.
int mod, regop, rm;
get_modrm(*current, &mod, &regop, &rm);
AppendToBuffer("cvtss2sd %s,", NameOfXMMRegister(regop));
« no previous file with comments | « src/ia32/disasm-ia32.cc ('k') | test/cctest/test-disasm-ia32.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698