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Issue 3471011: Implemented missing instructions in ia32 and x64 disassembler.... (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 10 years, 3 months ago
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1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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884 bool has_register = false; // Is the FPU register encoded in modrm_byte? 884 bool has_register = false; // Is the FPU register encoded in modrm_byte?
885 const char* mnem = "?"; 885 const char* mnem = "?";
886 886
887 switch (escape_opcode) { 887 switch (escape_opcode) {
888 case 0xD8: 888 case 0xD8:
889 UnimplementedInstruction(); 889 UnimplementedInstruction();
890 break; 890 break;
891 891
892 case 0xD9: 892 case 0xD9:
893 switch (modrm_byte & 0xF8) { 893 switch (modrm_byte & 0xF8) {
894 case 0xC0:
895 mnem = "fld";
896 has_register = true;
897 break;
894 case 0xC8: 898 case 0xC8:
895 mnem = "fxch"; 899 mnem = "fxch";
896 has_register = true; 900 has_register = true;
897 break; 901 break;
898 default: 902 default:
899 switch (modrm_byte) { 903 switch (modrm_byte) {
900 case 0xE0: mnem = "fchs"; break; 904 case 0xE0: mnem = "fchs"; break;
901 case 0xE1: mnem = "fabs"; break; 905 case 0xE1: mnem = "fabs"; break;
902 case 0xE4: mnem = "ftst"; break; 906 case 0xE4: mnem = "ftst"; break;
903 case 0xE8: mnem = "fld1"; break; 907 case 0xE8: mnem = "fld1"; break;
908 case 0xEB: mnem = "fldpi"; break;
904 case 0xEE: mnem = "fldz"; break; 909 case 0xEE: mnem = "fldz"; break;
905 case 0xF5: mnem = "fprem1"; break; 910 case 0xF5: mnem = "fprem1"; break;
906 case 0xF7: mnem = "fincstp"; break; 911 case 0xF7: mnem = "fincstp"; break;
907 case 0xF8: mnem = "fprem"; break; 912 case 0xF8: mnem = "fprem"; break;
908 case 0xFE: mnem = "fsin"; break; 913 case 0xFE: mnem = "fsin"; break;
909 case 0xFF: mnem = "fcos"; break; 914 case 0xFF: mnem = "fcos"; break;
910 default: UnimplementedInstruction(); 915 default: UnimplementedInstruction();
911 } 916 }
912 } 917 }
913 break; 918 break;
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1052 } else { 1057 } else {
1053 AppendToBuffer("%s,", NameOfXMMRegister(regop)); 1058 AppendToBuffer("%s,", NameOfXMMRegister(regop));
1054 current += PrintRightOperand(current); 1059 current += PrintRightOperand(current);
1055 } 1060 }
1056 } else if (opcode == 0x2A) { 1061 } else if (opcode == 0x2A) {
1057 // CVTSI2SD: integer to XMM double conversion. 1062 // CVTSI2SD: integer to XMM double conversion.
1058 int mod, regop, rm; 1063 int mod, regop, rm;
1059 get_modrm(*current, &mod, &regop, &rm); 1064 get_modrm(*current, &mod, &regop, &rm);
1060 AppendToBuffer("%sd %s,", mnemonic, NameOfXMMRegister(regop)); 1065 AppendToBuffer("%sd %s,", mnemonic, NameOfXMMRegister(regop));
1061 current += PrintRightOperand(current); 1066 current += PrintRightOperand(current);
1067 } else if (opcode == 0x2C) {
1068 // CVTTSD2SI:
1069 // Convert with truncation scalar double-precision FP to integer.
1070 int mod, regop, rm;
1071 get_modrm(*current, &mod, &regop, &rm);
1072 AppendToBuffer("cvttsd2si%c %s,",
1073 operand_size_code(), NameOfCPURegister(regop));
1074 current += PrintRightXMMOperand(current);
1075 } else if (opcode == 0x2D) {
1076 // CVTSD2SI: Convert scalar double-precision FP to integer.
1077 int mod, regop, rm;
1078 get_modrm(*current, &mod, &regop, &rm);
1079 AppendToBuffer("cvtsd2si%c %s,",
1080 operand_size_code(), NameOfCPURegister(regop));
1081 current += PrintRightXMMOperand(current);
1062 } else if ((opcode & 0xF8) == 0x58 || opcode == 0x51) { 1082 } else if ((opcode & 0xF8) == 0x58 || opcode == 0x51) {
1063 // XMM arithmetic. Mnemonic was retrieved at the start of this function. 1083 // XMM arithmetic. Mnemonic was retrieved at the start of this function.
1064 int mod, regop, rm; 1084 int mod, regop, rm;
1065 get_modrm(*current, &mod, &regop, &rm); 1085 get_modrm(*current, &mod, &regop, &rm);
1066 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop)); 1086 AppendToBuffer("%s %s,", mnemonic, NameOfXMMRegister(regop));
1067 current += PrintRightXMMOperand(current); 1087 current += PrintRightXMMOperand(current);
1068 } else { 1088 } else {
1069 UnimplementedInstruction(); 1089 UnimplementedInstruction();
1070 } 1090 }
1071 } else if (group_1_prefix_ == 0xF3) { 1091 } else if (group_1_prefix_ == 0xF3) {
(...skipping 10 matching lines...) Expand all
1082 AppendToBuffer("%s,", NameOfXMMRegister(regop)); 1102 AppendToBuffer("%s,", NameOfXMMRegister(regop));
1083 current += PrintRightOperand(current); 1103 current += PrintRightOperand(current);
1084 } 1104 }
1085 } else if (opcode == 0x2A) { 1105 } else if (opcode == 0x2A) {
1086 // CVTSI2SS: integer to XMM single conversion. 1106 // CVTSI2SS: integer to XMM single conversion.
1087 int mod, regop, rm; 1107 int mod, regop, rm;
1088 get_modrm(*current, &mod, &regop, &rm); 1108 get_modrm(*current, &mod, &regop, &rm);
1089 AppendToBuffer("%ss %s,", mnemonic, NameOfXMMRegister(regop)); 1109 AppendToBuffer("%ss %s,", mnemonic, NameOfXMMRegister(regop));
1090 current += PrintRightOperand(current); 1110 current += PrintRightOperand(current);
1091 } else if (opcode == 0x2C) { 1111 } else if (opcode == 0x2C) {
1092 // CVTTSS2SI: Convert scalar single-precision FP to dword integer. 1112 // CVTTSS2SI:
1113 // Convert with truncation scalar single-precision FP to dword integer.
1093 // Assert that mod is not 3, so source is memory, not an XMM register. 1114 // Assert that mod is not 3, so source is memory, not an XMM register.
1094 ASSERT_NE(0xC0, *current & 0xC0); 1115 ASSERT_NE(0xC0, *current & 0xC0);
1095 current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current); 1116 current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current);
Lasse Reichstein 2010/09/24 12:19:16 Could this function be used for cvt[t]sd2si above?
Vladislav Kaznacheev 2010/09/24 12:55:05 This was the first thing I tried. PrintOperand wou
1096 } else if (opcode == 0x5A) { 1117 } else if (opcode == 0x5A) {
1118 // CVTSS2SD:
1119 // Convert scalar single-precision FP to scalar double-precision FP.
1097 int mod, regop, rm; 1120 int mod, regop, rm;
1098 get_modrm(*current, &mod, &regop, &rm); 1121 get_modrm(*current, &mod, &regop, &rm);
1099 AppendToBuffer("cvtss2sd %s,", NameOfXMMRegister(regop)); 1122 AppendToBuffer("cvtss2sd %s,", NameOfXMMRegister(regop));
1100 current += PrintRightXMMOperand(current); 1123 current += PrintRightXMMOperand(current);
1101 } else { 1124 } else {
1102 UnimplementedInstruction(); 1125 UnimplementedInstruction();
1103 } 1126 }
1104 } else if (opcode == 0x1F) { 1127 } else if (opcode == 0x1F) {
1105 // NOP 1128 // NOP
1106 int mod, regop, rm; 1129 int mod, regop, rm;
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1687 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { 1710 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
1688 fprintf(f, " "); 1711 fprintf(f, " ");
1689 } 1712 }
1690 fprintf(f, " %s\n", buffer.start()); 1713 fprintf(f, " %s\n", buffer.start());
1691 } 1714 }
1692 } 1715 }
1693 1716
1694 } // namespace disasm 1717 } // namespace disasm
1695 1718
1696 #endif // V8_TARGET_ARCH_X64 1719 #endif // V8_TARGET_ARCH_X64
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